Balancing Programmability And Performance In Cars

By Ann Mutschler - 05 Sep, 2024 - Comments: 0

The rate of change in the automotive industry is accelerating with the shift toward software-defined vehicles and ongoing advancements in algorithms and chip architectures. The challenge now is to figure out the best way to prevent rapid obsolescence, improve safety, and keep the cost of these changes to a minimum. Today, updatable automotive hardware is typically achieved through FPGAs, but... » read more

Using eFPGAs For Security

By Ed Sperling - 21 Sep, 2022 - Comments: 0

Andy Jaros, vice president at Flex Logix, talks about the use of eFPGAs to keep pace with security risks over longer chip lifetimes, how configurable RTL can help, and why systems companies are altering the playing field for FPGAs. » read more

Is Programmable Overhead Worth The Cost?

By Brian Bailey - 13 Jan, 2022 - Comments: 0

Programmability has fueled the growth of most semiconductor products, but how much does it actually cost? And is that cost worth it? The answer is more complicated than a simple efficiency formula. It can vary by application, by maturity of technology in a particular market, and in the context of much larger systems. What's considered important for one design may be very different for anothe... » read more

Challenges For New AI Processor Architectures

By Brian Bailey - 29 Jul, 2021 - Comments: 0

Investment money is flooding into the development of new AI processors for the data center, but the problems here are unique, the results are unpredictable, and the competition has deep pockets and very sticky products. The biggest issue may be insufficient data about the end market. When designing a new AI processor, every design team has to answer one fundamental question — how much flex... » read more

The Rise Of SmartNICs

By Kartik Srinivasan - 03 Jun, 2021 - Comments: 0

Network interface cards (NICs) have been on the market since shortly after the first PCs in the mid-1980s. However, over the past few years, we’ve seen the emergence of SmartNICs. What is a SmartNIC? The most basic definition of a SmartNIC is simply a programmable NIC. Others have overloaded the concept by heaping vast amounts of silicon and firmware into their implementations. A good work... » read more

Why AI Systems Are So Hard To Predict

By Ed Sperling - 12 Jan, 2021 - Comments: 0

AI can do many things, but how to ensure that it does the right things is anything but clear. Much of this stems from the fact that AI/ML/DL systems are built to adapt and self-optimize. With properly adjusted weights, training algorithms can be used to make sure these systems don't stray too far from the starting point. But how to test for that, in the lab, the fab and in the field is far f... » read more

Performance and Power Tradeoffs At 7/5nm

By Ed Sperling - 27 Oct, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss power optimization with Oliver King, CTO at Moortec; João Geada, chief technologist at Ansys; Dino Toffolon, senior vice president of engineering at Synopsys; Bryan Bowyer, director of engineering at Mentor, a Siemens Business; Kiran Burli, senior director of marketing for Arm's Physical Design Group; Kam Kittrell, senior product management group d... » read more

Choosing The Right Level Of Programmability

By Tommy Mullane - 12 Mar, 2020 - Comments: 0

Designers prefer to design in flexibility. The reasons are legion and mostly obvious: you may not know today how a chip will be used tomorrow – best to delay setting anything in concrete until you are sure how it is going to be used. You may not fully understand the design until it is nearing completion, and premature optimization can leave you in a difficult situation. And there are more pra... » read more

Chip Design Is Getting Squishy

By Ed Sperling - 27 Feb, 2020 - Comments: 0

So many variables, uncertainties and new approaches are in play today across the chip industry today that previous rules are looking rather dated. In the past, a handful of large companies or organizations set the rules for the industry and established an industry roadmap. No such roadmap exists today. And while there are efforts underway to create new roadmaps for different industries, inte... » read more

Smart NiCs

By Ed Sperling - 05 Aug, 2019 - Comments: 1

Manish Sinha, strategic planning for marketing and business at Achronix, talks with Semiconductor Engineering about what’s changing in networking interface cards, how to get more performance out of these devices, and how much needs to be in hardware versus software. » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?