Heterogeneous Computing Raises The Bar For Functional Verification


If there’s one thing certain in chip development, it’s that every innovation in architecture or semiconductor technology puts more pressure on the functional verification process. The increase in gate count for each new technology node stresses tool capacity. Every step up in complexity makes it harder to find deep, corner-case bugs. The dramatic growth in SoC designs brings software into p... » read more

Embedded FPGA Timing


Namit Varma, senior director of Achronix’s India Technology Center, explains how to time an eFPGA, what can go wrong, what are the different clocking scenarios, and what impact variation has on the process. https://youtu.be/Jq4XUKnniB4 » read more

Tech Talk: eFPGA Density


Chen Wang, senior vice president of engineering at Flex Logix, talks about how to improve density in embedded FPGAs. https://youtu.be/Rk0oqzWQr8I » read more

Targeting And Tailoring eFPGAs


Robert Blake, president and CEO of Achronix, sat down with Semiconductor Engineering to discuss what's changing in the embedded FPGA world, why new levels of customization are so important, and difficulty levels for implementing embedded programmability. What follows are excerpts of that discussion. SE: There are numerous ways you can go about creating a chip these days, but many of the prot... » read more

Finite State Machine Synthesis In Programmable Circuits


Well, summer has been and gone; and for most of us it was a time to relax and reflect on our working practices. What can we do to achieve better results? And what can we do to break out of the routine of working on so many revisions? For me, one of my summer break ponderings was thinking back on a trick I learned while working with my colleagues at the Silesian University of Technology. C... » read more

Synthesis Of Energy-Efficient FSMs Implemented In PLD Circuits


The paper presents an outline of a simple synthesis method of energy-efficient FSMs. The idea consists in using local clock gating to selectively block the clock signal, if no transition of a state of a memory element is required. The research was dedicated to logic circuits using Programmable Logic Devices as the implementation platform, but the conclusions can be applied to any synchronous ci... » read more

A Chip For All Seasons


FPGAs are showing up in more designs and in more markets, and as they get included in more systems they are becoming much more complex. A decade ago, the key markets for [gettech id="31071" t_name="FPGAs"] were industrial, medical, automotive and aerospace. Those markets remain strong, but FPGAs also are playing a role in artificial intelligence, data centers, the [getkc id="76" kc_name="... » read more

Tech Talk: DO-254


Aldec's Louie De Luna explains the safety critical standard for the aerospace industry and how that parallels what's happening in automotive electronics. https://youtu.be/qa1g1NNVj60 » read more

FDA: Postmarket Management of Cybersecurity in Medical Devices


Source: U.S. Food & Drug Administration, Center for Devices & Radiological Health dated 12/28/16 "The Food and Drug Administration (FDA) is issuing this guidance to inform industry and FDA staff of the Agency’s recommendations for managing postmarket cybersecurity vulnerabilities for marketed and distributed medical devices. In addition to the specific recommendations contained in this gui... » read more

Rethinking Processor Architectures


The semiconductor industry's obsession with clock speeds, cores and how many transistors fit on a piece of silicon may be nearing an end for real this time. The [getentity id="22048" comment="IEEE"] said it will develop the International Roadmap for Devices and Systems (IRDS), effectively setting the industry agenda for future silicon benchmarking and adding metrics that are relevant to specifi... » read more

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