Auto Chip Reliability Opens Door To Other Industries


Digital chips in the semiconductor industry evolve from each other. Ideas flow into each other over the years, with occasional big leaps in evolution. The term ‘evolution’ fits because one chip evolves to perfectly optimized for one industry niche. But what happens when one industry’s chip becomes a useful for other industries because it is more cost-effective than what is being used i... » read more

In-field In-Mission Reliability Monitoring Based On Deep Data


This paper describes a Deep Data approach to reliability monitoring in advanced electronics, based on degradation as a precursor for failure. By applying machine learning algorithms and analytics to data created by on-chip monitoring IPs (Agents), IC/system health and performance can be continuously monitored, at all stages of the product lifecycle. Realtime degradation analysis of critical par... » read more

No Two Chips Are Alike


As semiconductor processes continue to shrink it’s becoming increasingly challenging to manage the parameters of individual devices not only across the diameter of the wafer, but also across the length of a single chip, especially for a complex chip with a large area. Today’s standard approach to this problem is to assume the worst case and to create a sub-optimal design that accommodates t... » read more

Navigating Timing Margins Like Waze


Remember the pre-smartphone days, before navigation apps had our backs? Thanks to a lack of real-time visibility, ‘arriving early’ was the go-to strategy to avoid arriving late. Factor in too much ‘holdup time’ and you’d arrive a little too early. There’s nothing worse than nervously burning off an excess 30 minutes over a coffee you really didn’t need. Today you wouldn’t ... » read more

Advanced Packaging Makes Testing More Complex


The limits of monolithic integration, together with advances in chip interconnect and packaging technologies, have spurred the growth of heterogeneous advanced packaging where multiple dies are co-packaged using 2.5D and 3D approaches. But this also raises complex test challenges, which are driving new standards and approaches to advanced-package testing. While many of the showstopper issues... » read more

Monitoring IC Abnormalities Before Failures


The rising complexities of semiconductor processes and design are driving an increasing use of on-chip monitors to support data analytics from an IC’s birth through its end of life — no matter how long that projected lifespan. Engineers have long used on-chip circuitry to assist with manufacturing test, silicon debug and failure analysis. Providing visibility and controllability of inter... » read more

Data Becomes Key For Next-Gen Chips


Data has become vital to understanding the useful life of a semiconductor — and the knowledge gleaned is key to staying competitive beyond Moore’s Law. What's changed is a growing reliance earlier in the design cycle on multiple sources of data, including some from further right in the design-through-manufacturing flow. While this holistic approach may seem logical enough, the semiconduc... » read more

RMAs: Root Problem Found


For decades, costs of production and maintenance have been driven down through manufacturing, process and logistical innovation, creating more breathing room for margin to maintain viable growth. There are other costs, however, that we seemingly accept as inevitable and simply get better at factoring in as par-for-the-course, or ‘eggs broken’ to make the omelet. The ubiquitous presence of ... » read more

Week In Review: Manufacturing, Test


Fast Arm-based supercomputer Japan has taken the lead in the supercomputer race, jumping ahead of the U.S. But China continues to make its presence felt in the arena. Fugaku, an ARM-based supercomputer jointly developed by Japan’s Riken and Fujitsu, is now ranked the world’s fastest supercomputer in the 55th TOP500 list. Fugaku turned in a high performance Linpack (HPL) result of 415.5... » read more

Week In Review: Auto, Security, Pervasive Computing


Security The U.S. Defense Advanced Research Projects Agency (DARPA) selected Synopsys as the main contractor to provide SoC design tools and security IP for its Automatic Implementation of Secure Silicon (AISS) program. The four-year program’s goal to develop a design tool and IP ecosystem to automate adding security into integrated circuits. Synopsys will be working on a research team with ... » read more

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