How Secure Are FPGAs?


The unique hybrid software/hardware nature of FPGAs makes them tempting targets for cyberattacks, while also enabling them to rebuff attacks and change the attack surface before significant damage can be done. But it's becoming increasingly challenging to address all the potential vulnerabilities. FPGAs are often included in larger systems, each with their own unique attack vectors as well a... » read more

Side-Channel Attack Protection For Quantum Safe Cryptography


A recent Reuters Special Report discussed the race between the US and China to protect digital assets and communications from the potential threat posed by quantum computers. Cryptographically relevant quantum computers, those that are powerful enough to crack existing public key-based encryption methods, could compromise military, economic, and personal information across the globe. While the ... » read more

Package Propagation Delay Dependency Of Advanced Fly-By Routing For Next Generation DDR5


Package signal transit delay is an important parameter for high-speed designs like DDR5. Package delay along with PCB delay dictates the data rates of DDR5 interface running at 4.0 Gbps and beyond. From DDR3 (third generation DDR) onwards, daisy chain routing has been widely used as it can support high data rate operations by providing smaller trace stubs and capacitive loadings. Even so, beyon... » read more

Top Tech Videos of 2023


In 2023, heterogeneous integration, RISC-V, and advanced node logic scaling and advanced packaging dominated the semiconductor industry. All of those topics spurred deep discussions at conferences, and they were the subject of Semiconductor Engineering's most popular videos. Of the videos published in 2023, here are the highlights from our five channels: Manufacturing, Packaging & Mater... » read more

Dramatic Changes Ahead For Chips And Systems


Early this year, most people had never heard of generative AI. Now the entire world is racing to capitalize on it, and that's just the beginning. New markets, such as spatial computing, quantum computing, 6G, smart infrastructure, sustainability, and many more are accelerating the need to process more data faster, more efficiently, and with much more domain specificity. Compared to the days ... » read more

Blog Review: Dec. 20


Siemens' Huw Geddes finds that the flexibility offered by the RISC-V ISA can introduce further verification and validation requirements to ensure that the combination of extensions and customization not just works but does not break anything else while delivering expected performance, plus looks at how processor trace can help. Cadence's Gustavo Araujo explains the various optimizations in t... » read more

Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan Synopsys acquired Imperas, pushing further into the RISC-V world with Imperas' virtual platform technology for verifying and emulating processors. Synopsys has been building up its RISC-V portfolio, starting with ARC-V processor IP and a full suite of tools introduced last month. The first high-NA EUV R&D center in the U.S. will be built at... » read more

The Journey To Exascale Computing And Beyond


High performance computing witnessed one of its most ambitious leaps forward with the development of the US supercomputer “Frontier.” As Scott Atchley from Oak Ridge National Laboratory discussed at Supercomputing 23 (SC23) in Denver last month, the Frontier had the ambitious goal of achieving performance levels 1000 times higher than the petascale systems that preceded it, while also stayi... » read more

HBM3 Memory: Break Through to Greater Bandwidth


Delivering unrivaled memory bandwidth in a compact, high-capacity footprint, has made HBM the memory of choice for AI/ML and other high-performance computing workloads. HBM3 as the latest generation of the standard raises data rates to 6.4 Gb/s and promises to scale even higher. The Rambus HBM3 controller provides industry-leading support of the extended roadmap for HBM3 with performance to 9.6... » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan AMD took the covers off new AI accelerators for training and inferencing of large language model and high-performance computing workloads. In its announcement, AMD focused heavily on performance leadership in the commercial AI processor space through a combination of architectural changes, better software efficiency, along with some improvements in... » read more

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