tag: Rambus

Securing Server Systems And Data At The Hardware Level
By Gijs Willemse - 12 Jul, 2021 - Comments: 0

Across the global internet, there’s a growing need to secure data, not only coursing over the network, but within the servers in data centers and deployed at the edge. Interconnect technologies such as Compute Express Link (CXL) will enable future servers to be disaggregated into composable resources that can be finely matched to the requirements of varied workloads and support virtualized co... » read more

Week In Review: Design, Low Power
By Jesse Allen - 09 Jul, 2021 - Comments: 0

Tools Aldec extended its TySOM family of embedded prototyping boards with the introduction of TySOM-M-MPFS250, the first in a planned series to feature a Microchip PolarFire SoC FPGA MPFS250T-FCG1152 and to have dual FMC connectivity. The board contains 16Gb FPGA DDR4 x32, 16Gb MSS DDR4 x36 with ECC, eMMC, SPI Flash memory, 64 Kb EEPROM and a microSD card socket. The PolarFire SoC is a five-st... » read more

Lower Power Chips: What To Watch Out For
By Ann Mutschler - 08 Jul, 2021 - Comments: 0

Low-power design in advanced nodes and advanced packaging is becoming a multi-faceted, multi-disciplinary challenge, where a long list of issues need to be solved both individually and in the context of other issues. With each new leading-edge process node, and with increasingly dense packaging, the potential for problematic interactions is growing. That, in turn, can lead to poor yield, cos... » read more

Retimers Replacing Redrivers As Signal Speeds Increase
By Bryon Moyer - 08 Jul, 2021 - Comments: 1

Retimers are undergoing a renaissance as new PHY protocols prove too demanding for redrivers. Redrivers and retimers both have been used to extend wired signal reach over the years. But redrivers have dominated this space due to their relative simplicity and lower cost. That balance is beginning to change. “A retimer represents three things no one wants in their system — area, cost, a... » read more

CXL Signals A New Era Of Data Center Architecture
By Tim Messegee - 08 Jul, 2021 - Comments: 0

An exponential rise in data volume and traffic across the global internet infrastructure is motivating exploration of new architectures for the data center. Disaggregation and composability would move us beyond the classic architecture of the server as the unit of computing. By separating the functional components of compute, memory, storage and networking into pools, composed on-demand to matc... » read more

MIPI Drives Performance For Next-Generation Displays
By Rambus - 07 Jul, 2021 - Comments: 0

MIPI Alliance technology has helped enable the dramatic growth of the mobile phone market. The function and capabilities of MIPI interface solutions have grown dramatically as well. MIPI DSI-2 has become the leading display interface across a growing range of products including smartphones, AR/VR, IoT appliances, and ADAS/autonomous vehicles. As the application space has expanded, so too have t... » read more

IoT Security: Confusing And Fragmented
By Bryon Moyer - 01 Jul, 2021 - Comments: 0

Security regulations for Internet-of-Things (IoT) devices are evolving around the world, but there is no consistent set of requirements that can be applied globally — and there may never be. What exists today is a patchwork of certification labs and logos. That makes it difficult for IoT-device designers to know where to get their security blessed. Unlike in data centers, where there is a ... » read more

CXL Memory Interconnect Initiative: Enabling A New Era of Data Center Architecture
By Rambus - 30 Jun, 2021 - Comments: 0

In response to an exponential growth in data, the industry is on the threshold of a groundbreaking architectural shift that will fundamentally change the performance, efficiency and cost of data centers around the globe. Server architecture, which has remained largely unchanged for decades, is taking a revolutionary step forward to address the growing demand for data and the voracious performan... » read more

Blog Review: June 23
By Jesse Allen - 23 Jun, 2021 - Comments: 0

Synopsys' Manuel Mota shows how splitting SoCs into smaller dies for advanced packaging and using die-to-die interfaces to enable high bandwidth, low latency, and low power connectivity can benefit hyperscale data centers. Siemens EDA's Chris Spear explains the relationship between classes and objects in SystemVerilog with a handy visualization and notes the difference between SystemVerilog ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 18 Jun, 2021 - Comments: 0

Rambus is making a push for Compute Express Link (CXL) with two acquisitions and the launch of its CXL Memory Interconnect Initiative. The initiative aims to define and develop semiconductor solutions for advanced data center architectures, with initial research and development focusing on solutions to support key memory expansion and pooling use cases. CXL is an open interconnect specificat... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy