tag: Rambus

Scramble For The White Space
By Bryon Moyer - 13 Oct, 2020 - Comments: 0

Chipmakers are pushing to utilize more of the unused portion of a design for different functions, reducing margin in the rest of the chip to more clearly define that white space. White space typically is used to relieve back-end routing congestion before all of the silicon area is used up. But a significant amount of space still remain unused. That provides an opportunity for inserting monit... » read more

Protecting Chiplet Architectures With Hardware Security
By Scott Best - 08 Oct, 2020 - Comments: 0

Chiplets are gaining significant traction as they provide compelling benefits for advancing semiconductor performance, costs, and time to market. With Moore’s Law slowing, building more powerful chips translates into building bigger chips. But with chip dimensions pushing up against reticle limits, growing the size of chips is increasingly impractical. Chiplets offer a new path forward by dis... » read more

Sensor Fusion Challenges In Cars
By Ann Mutschler - 08 Oct, 2020 - Comments: 0

The automotive industry is zeroing in on sensor fusion as the best option for dealing with the complexity and reliability needed for increasingly autonomous vehicles, setting the stage for yet another shift in how data from multiple devices is managed and utilized inside a vehicle. The move toward greater autonomy has proved significantly more complicated than anyone expected at first. There... » read more

Are FPGAs More Secure Than Processors?
By Bryon Moyer - 08 Oct, 2020 - Comments: 0

Security concerns often focus on software being executed on processors. But not all electronic functionality runs in software. FPGAs provide another way to do work, and they can be more secure than functions executed in software. FPGAs provide more control of hardware and are more opaque to attackers. In the case of embedded FPGAs, the designer is in complete control of the entire system. Th... » read more

The Importance Of Chiplet Security
By Rambus - 07 Oct, 2020 - Comments: 0

Chiplets are gaining significant traction as they deliver numerous benefits beyond what can be accomplished with a monolithic SoC in a time of slowing transistor scaling. However, disaggregating SoCs into multiple chiplets increases the attack surface which adversaries can exploit to penetrate safeguards to data and hardware. With chiplets, the risks of hardware-based trojans and exploits such ... » read more

Blog Review: Oct. 7
By Jesse Allen - 07 Oct, 2020 - Comments: 0

In a blog for Arm, University of Southampton PhD student Sivert Sliper looks at how energy-driven and intermittent computing could be used to power trillions of IoT devices and introduces a SystemC-based simulator for such systems. Mentor's Chris Spear explains why transaction classes should extend from uvm_sequence_item rather than uvm_transaction when designing UVM testbenches. Cadence'... » read more

RISC-V: Will There Be Other Open-Source Cores?
By Ed Sperling - 06 Oct, 2020 - Comments: 5

Part 3: Semiconductor Engineering sat down to discuss the business and technology landscape for RISC-V with Zdenek Prikryl, CTO of Codasip; Helena Handschuh, a Rambus Security Technologies fellow; Louie De Luna, director of marketing at Aldec; Shubhodeep Roy Choudhury, CEO of Valtrix Systems; and Bipul Talukdar, North America director of applications engineering at SmartDV. What follows are exc... » read more

Blog Review: Sept. 30
By Jesse Allen - 30 Sep, 2020 - Comments: 0

Synopsys' Fred Bals takes a look open source projects that, while popular, go understaffed or underfunded, how that can lead to potential security vulnerabilities, and why users who rely on them should consider stepping up to contribute. In a video, Mentor's Colin Walls explains the basic concepts of multicore systems as it relates to embedded programming. Cadence's Paul McLellan ponders ... » read more

Security At The Edge
By Ed Sperling And Susan Rambo - 29 Sep, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss security at the edge with Steven Woo, vice president of enterprise solutions technology and distinguished inventor at Rambus, Kris Ardis, executive director at Maxim Integrated; and Steve Roddy, vice president of Arm's Products Learning Group. What follows are excerpts of that conversation. To view part one of this discussion, click here. Part two i... » read more

Blog Review: Sept. 23
By Jesse Allen - 23 Sep, 2020 - Comments: 0

Arm's Matthew Mattina introduces a method to reduce the cost of neural network inference by combining both low-precision representation and the complexity-reducing Winograd transform while maintaining accuracy. Cadence's Paul McLellan checks out some of the biggest machine learning systems from Nvidia, Google, and Cerebras that were presented at the recent Hot Chips. Mentor's Robin Bornof... » read more

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