tag: Rambus

Hardware Security For AI Accelerators
By Rambus - 03 Jun, 2020 - Comments: 0

Dedicated accelerator hardware for artificial intelligence and machine learning (AI/ML) algorithms are increasingly prevalent in data centers and endpoint devices. These accelerators handle valuable data and models, and face a growing threat landscape putting AI/ML assets at risk. Using fundamental cryptographic security techniques performed by a hardware root of trust can safeguard these as... » read more

Week In Review: Design, Low Power
By Jesse Allen - 15 May, 2020 - Comments: 0

Tools & IP Synopsys released a range of IP for TSMC's 5nm process technology. It includes interface PHY IP such as 112G/56G Ethernet, Die-to-Die, PCIe 5.0, CXL, and CCIX; memory interface IP for DDR5, LPDDR5, and HBM2/2E; die-to-die PHYs for 112G USR/XSR connectivity and High-Bandwidth Interconnect; and foundation IP including logic libraries, multi-port memory compilers, and TCAMs. Sma... » read more

Enabling Chiplet And Co-Packaged Optics Architectures With 112G XSR SerDes
By Suresh Andani - 14 May, 2020 - Comments: 0

Conventional chip designs are struggling to achieve the scalability, as well as power, performance, and area (PPA), that are demanded of leading-edge designs. With the slowing of Moore’s Law, high complexity ASICs increasingly bump up against reticle limits. The demise of Dennard scaling means power consumption is a growing challenge. In this context, disaggregated architectures such as chipl... » read more

‘More Than Moore’ Reality Check
By Ann Mutschler - 14 May, 2020 - Comments: 1

The semiconductor industry is embracing multi-die packages as feature scaling hits the limits of physics, but how to get there with the least amount of pain and at the lowest cost is a work in progress. Gaps remain in tooling and methodologies, interconnect standards are still being developed, and there are so many implementations of packaging that the number of choices is often overwhelming. ... » read more

Big Changes For eFPGAs
By Ed Sperling - 11 May, 2020 - Comments: 0

Geoff Tate, CEO of Flex Logix, talks with Semiconductor Engineering about the state of embedded FPGAs, why this is easier for some companies than others, why this is important for adding flexibility into an ASIC, and what are the main applications for this technology. » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 08 May, 2020 - Comments: 0

Automotive Imagination Technologies and BAIC Capital have formed an automotive joint venture to create a new automotive fabless semiconductor company focused on China as a client. The JV will be headquartered in the Zhongguancun Integrated Circuit Design Park in Beijing, China, with Bravo Lee serving as CEO. The JV will license IP and software from Imagination to create automotive-grade SoCs. ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 08 May, 2020 - Comments: 0

Tools & IP Ansys' RedHawk-SC multiphysics signoff software was certified for all TSMC advanced process technologies, including N16, N12, N7, N6 and N5. The certification includes extraction, power integrity and reliability, signal electromigration (EM) and thermal reliability analysis and statistical EM budgeting analysis. Aldec launched a new FPGA accelerator board for high performance... » read more

Securing Data In Motion With MACsec
By Gijs Willemse - 07 May, 2020 - Comments: 0

For end-to-end security of data, it must be secured both when “at rest” (processed or stored in a connected device) and when it is “in motion” (communicated between connected devices). For data at rest, a hardware root of trust anchored in silicon provides that foundation upon which all data and device security is built. For example, the security of applications builds on an uncompromis... » read more

Making Sense Of PUFs
By Bryon Moyer - 07 May, 2020 - Comments: 3

As security becomes a principal design consideration, physically unclonable functions (PUFs) are seeing renewed interest as new players emerge onto the market. PUFs can play a central role in hardware roots of trust (HRoTs), but the messaging in the market can make it confusing to understand the different types of PUF as well as their pros and cons. PUFs leverage some uncertain aspect of som... » read more

MACsec Fundamentals: Securing Data in Motion
By Rambus - 06 May, 2020 - Comments: 0

For end-to-end security of data and devices, data must be secured both when it as rest (stored on a connected device) and when it is in motion (communicated between connected devices). For data at rest, a hardware root of trust anchored in silicon provides that foundation upon which all device security is built. Similarly, MACsec security anchored in hardware at the foundational communication l... » read more

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