Making Heterogeneous Integration More Predictable

By Ed Sperling - 29 Nov, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss problems and potential solutions in heterogeneous integration with Dick Otte, president and CEO of Promex Industries; Mike Kelly, vice president of chiplets/FCBGA integration at Amkor Technology; Shekhar Kapoor, senior director of product management at Synopsys; John Park, product management group director in Cadence's Custom I... » read more

What Can Go Wrong In Heterogeneous Integration

By Ed Sperling - 15 Nov, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss heterogeneous integration with Dick Otte, president and CEO of Promex Industries; Mike Kelly, vice president of chiplets/FCBGA integration at Amkor Technology; Shekhar Kapoor, senior director of product management at Synopsys; John Park, product management group director in Cadence's Custom IC & PCB Group; and Tony Mastroia... » read more

An Automated Method For Adding Resiliency To Mission-Critical SoC Designs

By Synopsys - 21 Jun, 2023 - Comments: 0

Adding safety measures to system-on-chip (SoC) designs in the form of radiation-hardened elements or redundancy is essential in making mission-critical applications in the Aerospace and Defense (A&D), cloud, automotive, robotics, medical, and Internet-of-Things (IoT) industries more resilient against random hardware failures that occur. Designing for reliable and resilient functionality doe... » read more

Solving The Reliability Problem Of Memristor-Based Artificial Neural Networks

By Technical Paper Link - 19 Mar, 2023 - Comments: 0

A technical paper titled "ReMeCo: Reliable Memristor-Based in-Memory Neuromorphic Computation" was published by researchers at Eindhoven University of Technology, University of Tehran, and USC. Abstract: "Memristor-based in-memory neuromorphic computing systems promise a highly efficient implementation of vector-matrix multiplications, commonly used in artificial neural networks (ANNs). H... » read more

Security-Aware Compiler-Assisted Countermeasure to Mitigate Fault Attacks on RISC-V

By Technical Paper Link - 26 Feb, 2023 - Comments: 0

A new technical paper titled "CompaSeC: A Compiler-Assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V" was published by researchers at TU Munich and Fraunhofer Institute for Applied and Integrated Security (AISEC). Abstract "Fault-injection attacks are a risk for any computing system executing security-relevant tasks, such as a secure boot process. While ha... » read more

Looking Inside Of Chips

By Ed Sperling - 10 Jan, 2023 - Comments: 0

Shai Cohen, co-founder and CEO of proteanTecs, sat down with Semiconductor Engineering to talk about how to boost reliability and add resiliency into chips and advanced packaging. What follows are excerpts of that conversation. SE: Several years ago, no one was thinking about on-chip monitoring. What's changed? Cohen: Today it is obvious that a solution is needed for optimizing performanc... » read more

L5 Adoption Hinges on 5G/6G

By Marie C. Baca - 31 Aug, 2022 - Comments: 1

Truly self-driving cars don’t yet exist, and research shows many consumers are wary of them anyway. What will it take to make fully autonomous cars possible? And how can automakers convince consumers to adopt such vehicles? Experts say the answer to both questions could lie in wireless communication networks. That’s because such networks offer a workaround to a major obstacle in autonomo... » read more

Unknowns Driving Up The Cost Of Auto IC Reliability

By Ed Sperling - 08 Feb, 2022 - Comments: 2

Automotive chipmakers are considering a variety of options to improve the reliability of ICs used for everything from sensors to artificial intelligence. But collectively they could boost the number of process steps, increase the time spent in manufacturing and packaging, and stir up concerns about the amount of data that needs to be collected, shared, and stored. Accounting for advanced pro... » read more

Changes In Auto Architectures

By Ed Sperling - 04 Aug, 2021 - Comments: 0

Automotive architectures are changing from a driver-centric model to one where technology supplements and in some cases replaces the driver. Hans Adlkofer, senior vice president and head of the Automotive Systems Group at Infineon, looks at the different levels of automation in a vehicle, what’s involved in the shift from domain to zonal architectures, why a mix of processors will be required... » read more

Targeting Redundancy In ICs

By Brian Bailey - 14 Jun, 2021 - Comments: 0

Technology developed for one purpose is often applicable to other areas, but organizational silos can get in the way of capitalizing on it until there is a clear cost advantage. Consider memory. All memories are fabricated with spare rows and columns that are swapped in when a device fails manufacturing test. "This is a common method to increase the yield of a device, based on how much memor... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?