TU Dresden: Tile-based Multi-Core Architecture for Heterogeneous RISC-V Processors Suitable for FPGA Platforms


New technical paper titled "AGILER: An Adaptive Heterogeneous Tile-Based Many-Core Architecture for RISC-V Processors" from researchers at Technische Universitaet Dresden (TU Dresden). Partial Abstract: "In this work, AGILER is proposed as an adaptive tile-base many-core architecture for heterogeneous RISC-V based processors. The proposed architecture consists of modular and adaptable heter... » read more

Who Does Processor Validation?


Defining what a processor is, and what it is supposed to do, is not always as easy as it sounds. In fact, companies are struggling with the implications of hundreds of heterogenous processing elements crammed into a single chip or package. Companies have extensive verification methodologies, but not for validation. Verification is a process of ensuring that an implementation matches a specif... » read more

Hardware Dynamic IFT Mechanism That Scales to Complex Open-Source RISC-V Processors


New technical paper titled "CellIFT: Leveraging Cells for Scalable and Precise Dynamic Information Flow Tracking in Hardware Designs" by researchers at ETH Zurich and Intel.  Paper to be presented at USENIX Security 2022 (August 10-12, 2022) in Boston, MA, USA. Partial Abstract "We introduce CELLIFT, a new design point in the space of dynamic IFT [Information flow tracking] for hardware. C... » read more

Audio, Visual Advances Intensify IC Design Tradeoffs


A spike in the number of audio and visual sensors is greatly increasing design complexity in chips and systems, forcing engineers to make tradeoffs that can affect performance, power, and cost. Collectively, these sensors generate so much data that designers must consider where to process different data, how to prioritize it, and how to optimize it for specific applications. The tradeoffs in... » read more

IP Industry Transformation


The design IP industry is developing an assortment of new options and licensing schemes that could affect everything from how semiconductor companies collaborate to how ICs are designed, packaged, and brought to market. The IP market already has witnessed a sweeping shift from a "design once, use everywhere" approach, to an "architect once, customize everywhere" model, in which IP is highly ... » read more

CFU Playground: Significant Speedups & Design Space Exploration Between CPU & Accelerator


Technical paper titled "CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAs," from Google, Purdue University and Harvard University. Abstract "We present CFU Playground, a full-stack open-source framework that enables rapid and iterative design of machine learning (ML) accelerators for embedded ML systems. Our toolchain tightly integr... » read more

How To Optimize A Processor


Optimizing any system is a multi-layered problem, but when it involves a processor there are at least three levels to consider. Architects must be capable of thinking across these boundaries because the role of each of the layers must be both understood and balanced. The first level of potential optimization is at the system level. For example, how does data come in and out of the processing... » read more

Differentiation And Architecture Licenses In RISC‑V


I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp. In a traditional processor IP model, there is a clear distinction between an off-the-shelf IP license that gives some level of configuration but no customization and a fairly expensive architecture license enabling ... » read more

Embedded Software: Sometimes Easier, Often More Complex


Embedded software, once a challenge to write, update, and optimize, is following the route of other types of software. It is abstracted, simpler to use, and much faster to write. But in some cases, it's also much harder to get right. From a conceptual level, the general definition of embedded software has not changed much. It's still low-level drivers and RTOSes that run close to the hardwar... » read more

RISC-V: Advanced Virtual Prototyping Solutions


New technical paper titled "Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challenges" from researchers at Institute of Computer Science, University of Bremen and Cyber-Physical Systems, DFKI GmbH. Abstract "Virtual prototypes (VPs) are crucial in today’s design flow. VPs are predominantly created in SystemC transaction-level modelin... » read more

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