Efficient TNN Inference on RISC-V Processing Cores With Minimal HW Overhead


A new technical paper titled "xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems" was published by researchers at ETH Zurich and Universita di Bologna. Abstract "Ternary neural networks (TNNs) offer a superior accuracy-energy trade-off compared to binary neural networks. However, until now, they have required specialized accelerators to realize their effic... » read more

Using Formal Verification To Evaluate The HW Reliability Of A RISC-V Ibex Core In The Presence Of Soft Errors


A technical paper titled “Using Formal Verification to Evaluate Single Event Upsets in a RISC-V Core” was published by researchers at University of Southampton. Abstract: "Reliability has been a major concern in embedded systems. Higher transistor density and lower voltage supply increase the vulnerability of embedded systems to soft errors. A Single Event Upset (SEU), which is also calle... » read more

RISC-V Heralds New Era Of Cooperation


RISC-V is paving the way for open source to become accepted within the hardware community, creating a level of industry collaboration never seen in the past, while revitalizing the connection between academia and industry. The big question is whether this arrangement is just a placeholder while the industry re-learns how to develop processors, or whether this processor architecture is someth... » read more

Competitive Open-Source EDA Tools


A technical paper titled “Basilisk: Achieving Competitive Performance with Open EDA Tools on an Open-Source Linux-Capable RISC-V SoC” was published by researchers at ETH Zurich and University of Bologna. Abstract: "We introduce Basilisk, an optimized application-specific integrated circuit (ASIC) implementation and design flow building on the end-to-end open-source Iguana system-on-chip (... » read more

Comparing Leakage Detection Methods On RISC-V Cores (Radboud University)


A technical paper titled “Plan your defense: A comparative analysis of leakage detection methods on RISC-V cores” was published by researchers at Radboud University. Abstract: "Hardening microprocessors against side-channel attacks is a critical aspect of ensuring their security. A key step in this process is identifying and mitigating “leaky” hardware modules, which inadvertently lea... » read more

General-Purpose 32-bit RISC-V MCU Core Expands Design Freedom


The microcontroller sector is evolving in an exciting direction by providing designers with a growing menu of choices tailored to their performance and power requirements. Unlike the classic 1990s debate between the merits of x86 (CISC) and PowerPC (RISC) CPU architectures, there is plenty of room under the MCU tent for competing – and complementary – processor cores. The common denominator... » read more

Exploring The Security Framework Of RISC-V Architecture In Modern SoCs


In the rapidly evolving world of technology, system-on-chip (SoC) designs have become a cornerstone for various applications, from automotive and mobile devices to data centers. These complex systems integrate multiple processors, a multi-level cache hierarchy, and various subsystems that share memory and system resources. However, this open access to shared memory and resources introduces pote... » read more

Hardware Fuzzer Utilizing LLMs


A new technical paper titled "Beyond Random Inputs: A Novel ML-Based Hardware Fuzzing" was published by researchers at TU Darmstadt and Texas A&M University. Abstract "Modern computing systems heavily rely on hardware as the root of trust. However, their increasing complexity has given rise to security-critical vulnerabilities that cross-layer at-tacks can exploit. Traditional hardware ... » read more

Trusted Electronics: Current And Future Developments


In today’s world, we encounter electronics increasingly as complex hardware/software systems, such as those in vehicles, machines, and communication devices. These systems are characterized by dramatic increases in functionality in areas like environment sensing, stages of autonomy, and the installation of future updates. Developing and manufacturing such electronic systems today requires glo... » read more

RISC-V Unleashes Your Imagination


Since October 2020, Renesas has been officially active in the RISC-V microcontroller space and successfully launched two ASSP products, for motor control and voice-driven HMI systems. Now a general-purpose MCU enhances the RISC-V portfolio. It is the first MCU using a RISC-V core developed internally at Renesas. The R9A02G021 general-purpose microcontroller features an interesting mix of an... » read more

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