tag: root cause analysis

Autonomous ASIC Root Cause Analysis
By Mehir Arora - 23 Dec, 2025 - Comments: 0

By Mehir Arora and Zackary Glazewski Over 50% of frontend ASIC hardware engineering time is spent on debugging and root cause analysis, spent churning through millions of lines of code and terabytes of waveform data. Despite this, there are no existing solutions for autonomous root cause analysis that use both code and waveform data. ChipAgents Root Cause Analysis (ChipAgents RCA) is the fir... » read more

Beyond The Core: Tackling System-Wide Debugging For Complex SoCs
By Francisca Tan - 09 Dec, 2025 - Comments: 0

The world of System-on-Chips (SoCs) is evolving – with the advancement of generative AI, the increasing demand for high-performance compute, and the innovative shift towards multi-chiplet architectures, system complexity is advancing at an increased pace. And with complexity comes an even greater challenge: debugging complexity. Silent data corruption, elusive timing-sensitive bugs, and i... » read more

Advanced Packaging Traceability And Root Cause Analysis
By Aftkhar Aslam - 20 Nov, 2025 - Comments: 0

The semiconductor industry is undergoing a profound transformation. What once centered on single-die silicon packaged in QFN or BGA formats has evolved into a landscape of multi-die integration, chiplets, 3D stacking, and photonics coupling. These advanced packaging architectures are redefining design, manufacturing, and test paradigms—enabling new levels of performance, efficiency, and funct... » read more

Top Five Trends In RTL Signoff
By Suresh Babu Barla - 30 Oct, 2025 - Comments: 0

By Suresh Babu Barla and Rimpy Chugh The “shift left” of the development cycle is critical for the huge, complex chips used in such applications as AI and high-performance computing (HPC). Identifying design issues at the netlist stage occurs far too late in the design development process. At this point, addressing such problems demands significant effort, primarily because most design-r... » read more

Achieving Zero Defect Manufacturing Part 2: Finding Defect Sources
By Prasad Bachiraju - 06 Aug, 2024 - Comments: 1

Semiconductor manufacturing creates a wealth of data – from materials, products, factory subsystems and equipment. But how do we best utilize that information to optimize processes and reach the goal of zero defect manufacturing? This is a topic we first explored in our previous blog, “Achieving Zero Defect Manufacturing Part 1: Detect & Classify.” In it, we examined real-time defe... » read more

Digital Twin for Secure Semiconductor Lifecycle Management: Prospects and Applications
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract:  "The expansive globalization of the semiconductor supply chain has introduced numerous untrusted entities into different stages of a device’s lifecycle, enabling them to compromise its security. To make matters worse, the increasing complexity in the design as well as aggressive time-to-market requirements of the newer generation of integrated circuits can lead either designers t... » read more

Comparing And Spotting The Difference Between Two Simulations
By Vtool - 26 Jan, 2022 - Comments: 0

Comparing is a basic skill we all use in our daily lives in order to understand reality and analyze situations. When it comes to chip verification, the fundamental task of checking also involves comparing because checking is always "checking vs. something" — the ASIC specification and/or a model. In practice, when we encounter a failing test, oftentimes we have a comparable passing tes... » read more

Adaptive NN-Based Root Cause Analysis in Volume Diagnosis for Yield Improvement
By Technical Paper Link - 02 Dec, 2021 - Comments: 1

Abstract "Root Cause Analysis (RCA) is a critical technology for yield improvement in integrated circuit manufacture. Traditional RCA prefers unsupervised algorithms such as Expectation Maximization based on Bayesian models. However, these methods are severely limited by the weak predictive capability of statistical models and can’t effectively transfer the yield learning experience from old... » read more

Machine Learning Enabled Root Cause Analysis For Low Power Verification
By Himanshu Bhatt - 13 Jul, 2020 - Comments: 0

By Himanshu Bhatt and Susantha Wijesekara Next-generation SoCs with advanced graphics, computing and artificial intelligence capabilities are posing unforeseen challenges in verification. Designers and verification engineers using static verification technologies for low power often see many violations in the initial stages. Efficient debugging and determining root cause is a real issue and ... » read more

The Debug Problem…
By Hagai Arbel - 23 Apr, 2020 - Comments: 1

While semiconductor verification techniques have evolved considerably over the last 25 years, the debug of design problems found during verification has barely changed. New algorithms including machine learning, visualization approaches, and problem-solving ideas allow a different approach to debugging that saves up to an order of magnitude in debug time. Since the inception of Hardware Desc... » read more

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