tag: Samsung Foundry

Week In Review: Design, Low Power
By Jesse Allen - 05 Apr, 2019 - Comments: 0

Tools & IP Cadence entered the system design and analysis market with the release of Clarity 3D Solver, which creates S-parameter models for use in signal integrity, power integrity, and electromagnetic compliance analysis. The tool uses a distributed adaptive meshing approach for cloud and on-premises distributed computing and it optimized to distribute a job across multiple low-cost comp... » read more

Week in Review: IoT, Security, Auto
By Jeff Dorsch - 29 Mar, 2019 - Comments: 0

Internet of Things Organizers for the Internet of Things World 2019 conference, coming up on May 13-16 in Santa Clara, Calif., surveyed more than 100 IoT leaders in various industries. Implementation (34%) and security (25%) were the highest concerns for the respondents. Those were followed by initial purchase (17%), scalability (10%), business buy-in (8%), and upkeep costs (3%). Two-thirds of... » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 Mar, 2019 - Comments: 0

ON Semiconductor will acquire Quantenna Communications for $24.50 per share in an all cash transaction, representing an equity value of approximately $1.07 billion and enterprise value of approximately $936 million. Quantenna, a maker of Wi-Fi chipsets, was founded in 2006 and went public in late 2016. Tools & IP Achronix completed testing and is now demonstrating the 112 Gbps SerDes th... » read more

Week In Review: Design, Low Power
By Jesse Allen - 22 Feb, 2019 - Comments: 0

Tools OneSpin unveiled a set of formal apps for development and assessment of RISC-V cores. The RISC-V Integrity Verification Solution formalizes the RISC-V ISA in a set of SystemVerilog Assertions to verify compliance for the ISA is met. It provides a formal bug absence core assessment environment for unbounded proofs and systematic discovery of all hidden instructions or unintended side effe... » read more

Week in Review: IoT, Security, Auto
By Jeff Dorsch - 22 Feb, 2019 - Comments: 0

Internet of Things Cattle ranchers in Australia are using solar-powered ear tags to keep track of their herds, connecting through LoRa technology to locate their bulls, cows, heifers, and steers. SODAQ of the Netherlands and Lacuna Space of the U.K. are providing the Internet of Things technology and satellite-based LoRa connectivity to make this possible. “The main differentiator for LoRa o... » read more

Week In Review: Design, Low Power
By Jesse Allen - 11 Jan, 2019 - Comments: 0

M&A QuickLogic acquired SensiML Corporation. Founded in 2017 as a spin-off from Intel, SensiML provides a Software-as-a-Service suite for developing pattern matching sensor algorithms optimized for ultra-low power consumption using machine learning. Details of the deal were not disclosed, though QuickLogic will fund it with shares of common stock. IP CEVA debuted an all-purpose, hybrid... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 Nov, 2018 - Comments: 0

Cadence taped out a complete GDDR6 memory IP solution consisting of PHY, controller and Verification IP on Samsung's 7LPP process. The GDDR6 IP allows up to 16Gb/sec bandwidth per pin, or over 500Gb/sec peak bandwidth between the SoC and each GDDR6 memory die. It is targeted at very high-bandwidth applications including AI, cryptocurrency mining, graphics, ADAS and HPC. ClioSoft debuted a So... » read more

Week In Review: Design, Low Power
By Jesse Allen - 16 Nov, 2018 - Comments: 0

Tools & Standards Mentor uncorked a PCB design platform for non-specialist PCB engineers focused on multi-dimensional verification. The Xpedition platform can integrate a range of verification tools within a singular authoring environment, providing automatic model creation, concurrent simulation, cross probing from results, and error reviews to identify problems at the schematic or layout... » read more

Week In Review: Design, Low Power
By Jesse Allen - 26 Oct, 2018 - Comments: 0

Tools OneSpin launched a formal verification tool that integrates with all major simulators, coverage databases and viewers, and chip design verification planning tools to provide a comprehensive view of verification progress. Comprised of two new formal apps, it can identify unreachable coverage points and provide them to the simulator to reduce wasted effort. Synopsys released the latest ... » read more

FD-SOI Going Mainstream
By Ed Sperling - 19 Jul, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss changes in the FD-SOI world and what's behind them, with James Lamb, deputy CTO for advanced semiconductor manufacturing and corporate technical fellow at Brewer Science; Giorgio Cesana, director of technical marketing at STMicroelectronics; Olivier Vatel, senior vice president and CTO at Screen Semiconductor Solutions; and Carlos Mazure, CTO at Soi... » read more

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