Chip Industry’s Technical Paper Roundup: October 17


New technical papers added to Semiconductor Engineering’s library this week. [table id=155 /] More Reading Technical Paper Library home » read more

An Overview Of Current Projects In The Open Quantum Hardware Ecosystem With Recommendations 


A technical paper titled “Open Hardware in Quantum Technology” was published by researchers at Unitary Fund, Qruise, Technical University of Valencia, M-Labs Limited, Lawrence Berkeley National Laboratory, Fermi National Accelerator Laboratory, Sandia National Laboratories, IQM Quantum Computers, PASQAL, Quantonation, Michigan State University, Università di Camerino, Microsoft Quantum, an... » read more

Week In Review: Manufacturing, Test


Intel aims to quadruple capacity for its most advanced chip packaging services by 2025, including with a new facility in Malaysia, per Nikkei Asia. Huawei is building a collection of secret semiconductor fabrication facilities across China to let the company skirt U.S. sanctions, SIA warned in a presentation seen by Bloomberg. It’s acquired at least two existing plants and is building at l... » read more

Chip Industry’s Technical Paper Roundup: July 12


New technical papers recently added to Semiconductor Engineering’s library: [table id=117 /] (more…) » read more

A Design Architecture For Optically Broadband Programmable PICs Utilizing Micromechanical Resonances 


A technical paper titled “Synchronous micromechanically resonant programmable photonic circuits” was published by researchers at The MITRE Corporation, Massachusetts Institute of Technology, Sandia National Laboratories, University of Arizona, and Brookhaven National Laboratory. Abstract: "Programmable photonic integrated circuits (PICs) are emerging as powerful tools for the precise ... » read more

Research Bits: Jan. 24


Transistor-free compute-in-memory Researchers from the University of Pennsylvania, Sandia National Laboratories, and Brookhaven National Laboratory propose a transistor-free compute-in-memory (CIM) architecture to overcome memory bottlenecks and reduce power consumption in AI workloads. "Even when used in a compute-in-memory architecture, transistors compromise the access time of data," sai... » read more

The Good And Bad Of Bi-Directional Charging


Auto OEMs are starting to offer bi-directional charging in EVs, allowing batteries to power homes during outages or wherever else it is needed, and to smooth out any hiccups in the grid. But this technology also can shorten the lifetime of batteries, and it can open the door to more cyberattacks. The idea behind bi-directional charging is simple enough. EVs can store huge amounts of power, a... » read more

Chip Industry’s Technical Paper Roundup: Nov. 29


New technical papers added to Semiconductor Engineering’s library this week. [table id=66 /]   Related Reading: Chip Industry’s Technical Paper Roundup: Nov. 21 New papers: lithography modeling; solving Rowhammer; energy-efficient batch normalization HW; 3-to-1 reconfigurable analog signal modulation circuit; lateral double magnetic tunnel junction; reduce branch mispredic... » read more

EV Charging Cybersecurity Challenges (Sandia National Labs)


A technical paper titled "Review of Electric Vehicle Charger Cybersecurity Vulnerabilities, Potential Impacts, and Defenses" was published by researchers at Sandia National Laboratories. Abstract: "Worldwide growth in electric vehicle use is prompting new installations of private and public electric vehicle supply equipment (EVSE). EVSE devices support the electrification of the transportat... » read more

Chip Industry’s Technical Paper Roundup: Oct 25


New technical papers added to Semiconductor Engineering’s library this week. [table id=59 /] » read more

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