tag: Schottky barrier

Schottky Barrier Transistors Roadmap (Univ. of Surrey, NaMLab, PGI et al.)
By Technical Paper Link - 17 Nov, 2024 - Comments: 0

A new technical paper titled "Roadmap for Schottky Barrier Transistors" was published by researchers at University of Surrey, NaMLab gGmbH, Forschungszentrum Jülic, Peter Grünberg Institute, et al. Abstract: "In this roadmap we consider the status and challenges of technologies that use the properties of a rectifying metal-semiconductor interface, known as a Schottky barrier, as an asset ... » read more

Integration Of Layered Semimetals With Conventional CMOS Platform
By Technical Paper Link - 27 Sep, 2023 - Comments: 0

A technical paper titled “Layered semimetal electrodes for future heterogeneous electronics” was published by researchers at IIT Madras and Indian Institute of Science Education and Research. Abstract: "Integration of the emerging layered materials with the existing CMOS platform is a promising solution to enhance the performance and functionalities of the future CMOS based integrated cir... » read more

High-Performance P-Type FET Arrays With Single-Crystal 2D Semiconductors And Fermi-Level-Tuned vdW Contact Electrodes
By Technical Paper Link - 15 Aug, 2023 - Comments: 0

A technical paper titled “Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes” was published by researchers at Ulsan National Institute of Science and Technology (UNIST), University of Pennsylvania, Institute for Basic Science (IBS), Sogang University, and Changwon National University. Abstract: "High-performance p-type t... » read more

SB MOSFET-Based Ultra-Low Power Real-Time Neurons for Neuromorphic Computing (Indian Institute of Technology)
By Technical Paper Link - 14 Jun, 2023 - Comments: 0

A technical paper titled “Schottky Barrier MOSFET Enabled Ultra-Low Power Real-Time Neuron for Neuromorphic Computing” was published by researchers at the Indian Institute of Technology (IIT) Bombay. Abstract: "Energy-efficient real-time synapses and neurons are essential to enable large-scale neuromorphic computing. In this paper, we propose and demonstrate the Schottky-Barrier MOSFE... » read more

Control of the Schottky barrier height in monolayer WS2 FETs using molecular doping (NIST)
By Technical Paper Link - 07 Sep, 2022 - Comments: 0

A new research paper titled "Control of the Schottky barrier height in monolayer WS2 FETs using molecular doping" was published by researchers at NIST, Theiss Research, Naval Research Laboratory, and Nova Research. Abstract: "The development of processes to controllably dope two-dimensional semiconductors is critical to achieving next generation electronic and optoelectronic devices. Unde... » read more

Gearing Up For Next-Gen Power Semis
By Mark LaPedus - 16 Sep, 2021 - Comments: 0

After years in R&D, several vendors are moving closer to shipping power semiconductors and other products based on next-generation wide-bandgap technologies. These devices leverage the properties of new materials, such as aluminum nitride, diamond, and gallium oxide, and they are also utilized in different structures, such as vertical gallium-nitride power devices. But while many of thes... » read more

Thinner Channels With 2D Semiconductors
By Katherine Derbyshire - 21 Jun, 2021 - Comments: 0

Moving to future nodes will require more than just smaller features. At 3/2nm and beyond, new materials are likely to be added, but which ones and exactly when will depend upon an explosion of material science research underway at universities and companies around the globe. With field-effect transistors, a voltage applied to the gate creates an electric field in the channel, bending the ban... » read more

Scaling Up Compute-In-Memory Accelerators
By Katherine Derbyshire - 19 Mar, 2020 - Comments: 3

Researchers are zeroing in on new architectures to boost performance by limiting the movement of data in a device, but this is proving to be much harder than it appears. The argument for memory-based computation is familiar by now. Many important computational workloads involve repetitive operations on large datasets. Moving data from memory to the processing unit and back — the so-called ... » read more

The Good And Bad Of 2D Materials
By Katherine Derbyshire - 27 Feb, 2019 - Comments: 0

Despite years of warnings about reaching the limits of silicon, particularly at leading-edge process nodes where electron mobility is limited, there still is no obvious replacement. Silicon’s decades-long dominance of the integrated circuit industry is only partly due to the material’s electronic properties. Germanium, gallium arsenide, and many other semiconductors offer superior mobili... » read more

New BEOL/MOL Breakthroughs?
By Mark LaPedus - 15 Jun, 2017 - Comments: 1

Chipmakers are moving ahead with transistor scaling at advanced nodes, but it's becoming more difficult. The industry is struggling to maintain the same timeline for contacts and interconnects, which represent a larger portion of the cost and unwanted resistance in chips at the most advanced nodes. A leading-edge chip consists of three parts—the transistor, contacts and interconnects. The ... » read more

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