FD-SOI At The Edge

By Ed Sperling - 03 Jan, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss changes in the FD-SOI world and what's behind them, with James Lamb, deputy CTO for advanced semiconductor manufacturing and corporate technical fellow at Brewer Science; Giorgio Cesana, director of technical marketing at STMicroelectronics; Olivier Vatel, senior vice president and CTO at Screen Semiconductor Solutions; and Carlos Mazure, CTO at Soi... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 07 Dec, 2018 - Comments: 0

Fab tools/manufacturing Lam Research has accepted Martin Anstice’s resignation as chief executive and a member of the board. Lam has named Tim Archer as president and chief executive effective immediately. Archer, who served as Lam’s president and chief operating officer, has been named to the board. One analyst provided a comment on the situation at Lam. “In our view, Mr. Archer is very... » read more

Where FD-SOI Works Best (Part 2)

By Ed Sperling - 15 Aug, 2018 - Comments: 0

FD-SOI Going Mainstream

By Ed Sperling - 19 Jul, 2018 - Comments: 0

Litho Options For Panel Fan-out

By Mark LaPedus - 06 Nov, 2017 - Comments: 2

Several packaging houses are inching closer to production of panel-level fan-out packaging, a next-generation technology that promises to reduce the cost of today’s fan-out packages. In fact, ASE, Nepes, Samsung and others already have installed the equipment in their panel-level fan-out lines with production slated for 2018 or so. But behind the scenes, panel-level packaging houses contin... » read more

Cheaper Fan-Outs Ahead

By Mark LaPedus - 07 Aug, 2017 - Comments: 6

Packaging houses continue to ramp up fan-out wafer-level packages in the market, but customers want lower cost fan-out products for a broader range of applications, such as consumer, RF and smartphones. So in R&D, the industry for some time has been developing next-generation fan-out using a panel-level format, a technology that could potentially lower the cost of fan-out. But there are ... » read more

Challenges For Future Fan-Outs

By Mark LaPedus - 07 Jul, 2017 - Comments: 1

The fan-out wafer-level packaging market is heating up. At the high end, for example, several packaging houses are developing new fan-out packages that could reach a new milestone and hit or break the magic 1µm line/space barrier. But the technology presents some challenges, as it may require more expensive process flows and equipment like lithography. Fig. 1: Redistribution layers. Source: L... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 08 Apr, 2016 - Comments: 0

Fab tool vendors In terms of sales for 2015, Applied Materials retained the No. 1 position in the wafer fab equipment (WFE) market with 1.3% growth last year, according to Garnter. Lam Research experienced the strongest growth of the top 10 vendors in 2015, moving into the No. 2 position. In the rankings, Lam jumped ahead of ASML and TEL. ASML was in third place, followed in order by TEL, KLA-... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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