DDR Memory Test Challenges From DDR3 to DDR5

By Keysight - 21 Sep, 2022 - Comments: 0

Cloud, networking, enterprise, high-performance computing, big data, and artificial intelligence are propelling the development of double data rate (DDR) memory chip technology. Demand for lower power requirements, higher density for more memory storage, and faster transfer speeds are constant. Servers drive the demand for next-generation DDR. Consumers benefit when existing and legacy generati... » read more

LPDDR4/4X DRAM Variants and Possible System Configurations

By Synopsys - 26 Feb, 2020 - Comments: 0

LPDDR is the de-facto standard for main-memory targeting mobile applications such as smartphones and tablets. Low-Power Double Data Rate Synchronous Dynamic Random Access Memories (LPDDR SDRAMs) or DRAMS offer high-performance while consuming significantly lower power than standard DDR memories, such as DDR5/4/3, which are ideal for systems requiring large memory capacity. For this reason, LPDD... » read more

The Importance Of Using The Right DDR SDRAM Memory

By Vadhiraj Sankaranarayanan - 14 Mar, 2019 - Comments: 0

Selecting the right memory technology is often the most critical decision for achieving the optimal system performance. Designers continue to add more cores and functionality to their SoCs; however, increasing performance while keeping power consumption low and silicon footprint small remains a vital goal. DDR SDRAMs, DRAMs in short, meet these memory requirements by offering a dense, high-perf... » read more

Collaboration Accelerates Moore’s Law

By Joe Gullo - 11 Sep, 2014 - Comments: 0

Moore's Law dictates that the number of transistors in dense, integrated circuits will double approximately every two years. Maintaining this pace of scaling, however, has become increasingly difficult given the ever-increasing complexity inherent with new chip starts. Additionally, the cost of using leading-edge process technology is prohibitively expensive. As a result, collaboration amon... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

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by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

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Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

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The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

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Megafabs churning out the most advanced processors are not the only game in town.

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tag: SDRAM

DDR Memory Test Challenges From DDR3 to DDR5

LPDDR4/4X DRAM Variants and Possible System Configurations

The Importance Of Using The Right DDR SDRAM Memory

Collaboration Accelerates Moore’s Law