Providing Line-Rate Network Security With MACsec

By Maxim Demchenko - 07 Nov, 2024 - Comments: 0

Network security protocols are the primary means of securing data in motion; that is, data communicated between closely connected physical devices or between devices and even virtual machines connected using a complex, geographically distributed infrastructure. This blog will explore Media Access Control security (MACsec) and how it can be used to provide foundational level network security for... » read more

PCIe IP With Enhanced Security For The Automotive Market

By Dana Neustadter - 07 Nov, 2024 - Comments: 0

The automotive industry is undergoing a rapid transformation, with connectivity and automation becoming integral components of modern vehicles. However, this increased connectivity also brings heightened risks. The automotive industry takes many measures to ensure safety for vehicles, but it is crucial to understand that these safety measures are ineffective if the vehicle's security is comprom... » read more

The Growing Imperative Of Hardware Security Assurance In IP And SoC Design

By Pavani Jella - 24 Oct, 2024 - Comments: 0

In an era where technology permeates every aspect of our lives, the semiconductor industry serves as the backbone of innovation. From IoT devices to data centers, every piece of technology relies on integrated circuits (ICs) such as intellectual property (IP) cores and system on chips (SoCs). As these technologies become increasingly pervasive, the importance of hardware security assurance in t... » read more

LLMs Show Promise In Secure IC Design

By Adam Kovac - 21 Oct, 2024 - Comments: 0

The introduction of large language models into the EDA flow could significantly reduce the time, effort, and cost of designing secure chips and systems, but they also could open the door to more sophisticated attacks. It's still early days for the use of LLMs in chip and system design. The technology is just beginning to be implemented, and there are numerous technical challenges that must b... » read more

Partial Header Encryption In Integrity And Data Encryption For PCIe

By Kunal Chhabriya - 10 Oct, 2024 - Comments: 0

Partial Header Encryption (PHE) is an additional mechanism added to Integrity and Data Encryption (IDE) in PCIe 6.0 to prevent side-channel attacks based on attacker analysis of the information included in the headers. This blog narrates PHE flow and Cadence VIP support for PHE in IDE across PCIe/CXL protocols. Background Introducing PCIe's Integrity and Data Encryption Feature is an excell... » read more

Security Concerns Weigh Down Open-Source EDA

By Adam Kovac - 10 Oct, 2024 - Comments: 0

Open-source EDA tools are free, readily available, and growing in numbers, but many chipmakers are wary of using them due to security concerns. On the plus side, proponents say these tools can help attract fresh new talent to chip design. Yet despite their spread online — GitHub alone has more than 140 EDA-specific repositories — using visible source code can provide new avenues of attac... » read more

Navigating Complexity And Enhancing Security In Advanced Automotive Systems

By Adiel Bahrouch - 05 Sep, 2024 - Comments: 0

As the automotive industry advances towards higher levels of Advanced Driver Assistance Systems (ADAS), the complexity of vehicles is growing at an unprecedented rate. Modern vehicles are equipped with an increasing array of ADAS sensors, sophisticated algorithms, powerful processors, advanced in-vehicle networks, and millions of lines of software code. These components are crucial for processi... » read more

Security Improving For Low-Cost Hardware

By Adam Kovac - 05 Sep, 2024 - Comments: 0

Security has been a priority in software for decades, but only recently has it begun catching up in chips — particularly those in inexpensive devices. The disconnect is that while these devices are low-cost, they often are connected to the same networks as more sophisticated devices and repositories for valuable data. It's not unusual for the entry point in ransomware or distributed denial... » read more

Edge Devices Require New Security Approaches

By Adam Kovac - 29 Aug, 2024 - Comments: 0

The diversity of connected devices and chips at the edge — the vaguely defined middle ground between the end point and the cloud — is significantly widening the potential attack surface and creating more opportunities for cyberattacks. The edge build-out has been underway for at least the past half-decade, largely driven by an explosion in data and increasing demands to process that data... » read more

As EDA Processes Becomes More Secure, So Do Chips

By Adam Kovac - 26 Aug, 2024 - Comments: 0

Security is becoming a much bigger concern within chips and electronic systems, but the actual implementation remains something of an afterthought, which limits its effectiveness. There are many pieces to the security puzzle on the chip design side that go well beyond just securing the hardware or the IP. The EDA tools themselves need to be secure, as well, and so does the user data within t... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?