Chip Industry Week In Review


Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Chip Industry Week In Review


Global spending on 300mm fab equipment is expected to reach a record US$400 billion from 2025 to 2027, according to SEMI. Key drivers are the regionalization of semiconductor fabs and the increasing demand for AI chips in data centers and edge devices, with China, South Korea, and Taiwan leading the way. The Biden-Harris Administration launched the National Semiconductor Technology Center’... » read more

Blog Review: Sept. 25


Cadence’s Mamta Rana digs into how PCIe 6.1 ECN builds on the FLIT-based architecture introduced in PCIe 6.0, further optimizing flow control mechanisms to handle increased data rates and improved efficiency but making verification of shared credit updates essential. Siemens’ Nicolae Tusinschi provides a primer on formal verification, including what makes it different from simulation, pr... » read more

Smart Manufacturing, Smart Data-AI, And Future Of Computing


By Melissa Grupen-Shemansky, Pushkar Apte, and Mark da Silva Use of machine learning and artificial intelligence (ML/AI) is on an exponential rise across fields1 including all aspects of the semiconductor industry. In the last decade, the use of ML/AI exploded in the areas of speech recognition, facial recognition, smart phone features, search engines and now large language models like Chat... » read more

Blog Review: Sept. 18


Siemens’ Kyle Fraunfelter explores the similarities between hurricane forecasting and semiconductor manufacturing to argue for the value of integrating real-time wafer fabrication measurements into the digital twin models used to simulate the semiconductor fabrication process. Cadence’s Rohini Kollipara introduces Display Stream Compression (DSC), which can enable higher resolutions and ... » read more

Chip Industry Week In Review


Infineon rolled out the world's first 300mm gallium nitride (GaN) wafer, opening the door for high-volume manufacturing of GaN-based power semiconductors. A 300mm wafer contains 2.3 times as many chips per wafer as a 200mm wafer. Fig.1: Infineon's 300mm GaN wafer. Source: Infineon The Semiconductor Industry Association released its 2024 State of the U.S. Semiconductor Industry report th... » read more

Blog Review: Sept. 11


Cadence's Neha Joshi introduces the IEEE 1801 standard, also known as UPF (Unified Power Format), which offers a uniform framework for defining power domains, power states, and power intent to ensure consistency across diverse tools and phases of the design process. Siemens' John McMillan warns that known good die may not behave the same in 3D-ICs as they do standalone and suggests that mult... » read more

Chip Industry Week In Review


Concerns mount on the use of American-manufactured semiconductors in Russian weapons, with Analog Devices, AMD, Intel and TI set to testify next week before the U.S. Senate Permanent Subcommittee on Investigations. Also, U.S. and other government agencies issued a joint advisory and more details about ongoing Russian military cyberattacks, espionage, and sabotage. The U.S. Commerce Departmen... » read more

Blog Review: Sept. 4


Synopsys' Jyotika Athavale and Randy Fish sit down with Google's Rama Govindaraju and Microsoft's Robert S. Chappell to discuss silent data corruption and why a solution will require chip designers and manufacturers, software and hardware engineers, vendors, and anyone involved in computer data to collaborate and take the issue seriously. Siemens' Karen Chow and Joel Mercier explain the rela... » read more

Blog Review: Aug. 28


Synopsys' Jon Ames checks out how the Ultra Ethernet Consortium aims to revolutionize networking by optimizing Ethernet for the rapidly evolving AI and HPC workloads by addressing critical issues like tail latency that are encountered by machine learning algorithms in large compute clusters. Cadence's Kos Gitchev introduces the DDR5 Multiplexed Rank DIMM (MRDIMM), a memory module technology ... » read more

← Older posts Newer posts →