Smarter Lights

By Michell Prunty - 20 Mar, 2014 - Comments: 0

New products targeting the emerging Smart Home Automation market are popping up every day. There are smart locks, smart thermostats, smart refrigerators, smart mirrors, and the list just goes on and on. Sooner or later, we, as consumers, will have to determine how all this smart technology will enter our homes. What will be the main gateway providing access to all this Smart Home Automation?... » read more

Experts At The Table: IP Subsystems

By Ed Sperling - 26 Jun, 2012 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss the transition to IP subsystems with Kevin Meyer, vice president of design enablement strategy and alliances at GlobalFoundries; Steve Roddy, vice president of marketing at Tensilica; Mike Gianfagna, vice president of marketing at Atrenta; and Adam Kablanian, CEO of Memoir Systems. What follows are excerpts of that con... » read more

Too Soon For Wide I/O

By Ed Sperling - 16 Jun, 2011 - Comments: 0

By Ann Steffora Mutschler When 3D ICs are prevalent, Wide I/O is sure to be there. But where does the technology stand today? Considering the amount of buzz and hype, it would be easy believe it is being implemented in production designs today. Wide I/O is a very brute-force way of solving the problem of trying to get latency down with a high-speed memory interface, explained Navraj Nandra,... » read more

IP Subsystems Are Nothing New

By Kurt Shuler - 28 Apr, 2011 - Comments: 0

By Kurt Shuler I’ve been hearing the term “IP subsystem” lately, and it seems to be the latest newfangled buzz word in the SoC semiconductor and IP industry, second only to “virtualization.” Much of the context for this growing interest in IP subsystems has been inspired from the work of Rich Wawrzyniak in his Semico Research report, “IP Subsystems: The Next IP Market Paradigm - Oc... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Semico

Smarter Lights

Experts At The Table: IP Subsystems

Too Soon For Wide I/O

IP Subsystems Are Nothing New