Test Costs Spiking


The cost of test is rising as a percentage of manufacturing costs, fueled by concerns about reliability of advanced-node designs in cars and data centers, as well as extended lifetimes for chips in those and other markets. For decades, test was limited to a flat 2% of total manufacturing cost, a formula developed prior to the turn of the Millennium after chipmakers and foundries saw the traj... » read more

Finding Defects In EUV Masks


Extreme ultraviolet (EUV) lithography is finally in production at advanced nodes, but there are still several challenges with the technology, such as EUV mask defects. Defects are unwanted deviations in chips, which can impact yield and performance. They can crop up during the chip manufacturing process, including the production of a mask or photomask, sometimes called a reticle. Fortunately... » read more

Week In Review: Manufacturing, Test


Chipmakers China has created a new $29 billion fund to help advance its semiconductor sector, according to reports from Bloomberg and others. Here's another report. The The U.S. and China are in the midst of a trade war. This has prompted China to accelerate its efforts to become more self-sufficient in semiconductor design and production. This includes DRAMs as well as logic/foundry. -----... » read more

Reducing Costly Flaws In Heterogeneous Designs


The cost of defects is rising as chipmakers begin adding multiple chips into a package, or multiple processor cores and memories on the same die. Put simply, one bad wire can spoil an entire system. Two main issues need to be solved to reduce the number of defects. The first is identifying the actual defect, which becomes more difficult as chips grow larger and more complex, and whenever chi... » read more

Week In Review: Manufacturing, Test


Packaging and test In a major deal that has some implications in the OSAT supply chain, South Korea’s Nepes has taken over Deca Technologies’ wafer-level packaging manufacturing line in the Philippines. In addition, Nepes has also licensed Deca’s M-Series wafer-level packaging technology. This includes fan-in technology as well as wafer- and panel-level fan-out. It also includes an ad... » read more

Wanted: More Fab Tool Part Standards


As chipmakers ramp up the next wave of processes and grapple with how to reduce defect levels, they are encountering problems from an unlikely source—components inside of the fab equipment. Defects are unwanted deviations in chips, which impact yields and device performance. Typically, they are caused by an unforeseen glitch during the process flow. But a lesser-known problem involves defe... » read more

Process Window Optimization


David Fried, vice president of computational products at Lam Research, examines increasing process variation and interactions between various types of variation, why different approaches are necessary to improve yield and continue scaling. » read more

Using Better Data To Shorten Test Time


The combination of machine learning plus more sensors embedded into IC manufacturing equipment is creating new possibilities for more targeted testing and faster throughput for fabs and OSATs. The goal is to improve quality and reduce the cost of manufacturing complex chips, where time spent in manufacturing is ballooning at the most advanced nodes. As the number of transistors on a die incr... » read more

Week In Review: Manufacturing, Test


Deals Apple will pay $1 billion to buy Intel's smartphone modem unit. Under the terms of the agreement, Apple will hire 2,200 Intel employees and acquire Intel's IP and equipment. The deal, expected to close in Q4, puts an end to Intel's attempts to win a piece of the smartphone market. But the chipmaker retains the right to develop modems for non-smartphone applications, including PCs, IoT de... » read more

Node Within A Node


Enough margin exists in manufacturing processes to carve out the equivalent of a full node of scaling, but shrinking that margin will require a collective push across the entire semiconductor manufacturing supply chain. Margin is built into manufacturing at various stages to ensure that chips are manufacturable and yield sufficiently. It can include everything from variation in how lines are... » read more

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