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Chip Monitoring And Test Collaborate


As on-chip monitoring becomes more prevalent in complex advanced-node ICs, it’s easy to question whether or not it conflicts with conventional silicon testing. It might even supplant such testing in the future. Or alternatively, they could interact, with each supporting the other. “On-chip monitors provide fine-grained observability into effects and issues that are otherwise difficult or... » read more

AI In Inspection, Metrology, And Test


AI/ML is creeping into multiple processes within the fab and packaging houses, although not necessarily for the purpose it was originally intended. The chip industry is just beginning to learn where AI makes sense and where it doesn't. In general, AI works best as a tool in the hands of someone with deep domain expertise. AI can do certain things well, particularly when it comes to pattern m... » read more

The Other Side Of AI System Reliability


Adding intelligence into pervasive electronics will have consequences, but not necessarily what most people expect. Nearly everything electronic these days has some sort of "smart" functionality built in or added on. This can be as simple as a smoke alarm that alerts you when the batteries are running low, a home assistant that learns your schedule and dials the thermostat up or down, or a r... » read more

Making Sure AI/ML Works In Test Systems


Artificial intelligence/machine learning is being utilized increasingly to find patterns and outlier data in chip manufacturing and test, improving the overall yield and reliability of end devices. But there are too many variables and unknowns to reliably predict how a chip will behave in the field using just AI. Today, every AI use case — whether a self-driving car or an industrial sortin... » read more

Digital Test Bulks Up – Or Down


Large digital integrated circuits are becoming harder to test in a time- and cost-efficient manner. AI chips, in particular, have tiled architectures that are putting pressure on older testing strategies due to the volume of test vectors required. In some cases, these chips are so large that they exceed reticle size, requiring them to be stitched together. New testing efficiencies are needed... » read more

Figuring Out Binary Datalog Formats Without A Specification


Being in the realm of semiconductor data with a wide range of customers, companies often throw interesting technical challenges at us. The most complex one so far this year is probably a request (OK, a requirement!) to interpret binary test datalog files so that they can then be analysed from our yieldHUB database system. The company provided us with little information on the actual binary form... » read more

Using ML For Post-Silicon Validation


Ira Leventhal, vice president of Advantest’s new concept product initiative, talks about how to use machine learning to ferret out hidden relationships in a complex design and to utilize that data to improve chips. » read more

Week In Review: Manufacturing, Test


Market research IC Insights has released its forecast for chips in terms of applications. Communications is still the biggest IC market, but automotive is growing the fastest. In its first forecast of artificial intelligence (AI) edge processors, International Data Corp. (IDC) estimates that worldwide shipments of AI-optimized processors for edge systems will reach 340.1 million units in 20... » read more

Challenges In Making And Testing STT-MRAM


Several chipmakers are ramping up a next-generation memory type called STT-MRAM, but there are still an assortment of manufacturing and test challenges for current and future devices. STT-MRAM, or spin-transfer torque MRAM, is attractive and gaining steam because it combines the attributes of several conventional memory types in a single device. In the works for years, STT-MRAM features the ... » read more

Week In Review: Manufacturing, Test


Chipmakers Here comes the battle between 5nm and 6nm processes at two foundry vendors—Samsung and TSMC. Meanwhile, Intel is behind and scrambling to get 10nm out the door. (Intel's 10nm is equivalent to 7nm from the foundries.) Last week, TSMC announced delivery of a complete version of its 5nm design infrastructure. TSMC’s 5nm technology is based on a finFET. This week, Samsung anno... » read more

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