Chip Industry Week In Review


Dealmaking Amkor inked a 10-year agreement with TSMC to provide advanced packaging and test services in Arizona, tying TSMC’s U.S. fab expansion to domestic OSAT capacity. Trump said in a post that Apple will partner with Intel on chip design and production in the U.S., marking a second reported win for the chipmaker this month. Intel Foundry will also reportedly manufacture 3 million... » read more

Research Bits: June 15


NAND in space Researchers from Georgia Institute of Technology and Pennsylvania State University built ferroelectric NAND flash memory chips that can withstand up to 30 times higher radiation levels compared to conventional NAND. “If you send traditional flash memory to space, the radiation interacting with flash memory’s trapped electric charge can easily corrupt the data,” said Asif... » read more

Chip Industry Technical Paper Roundup: May 19


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations Micro-Transfer Printing on Silicon Photonics: Tutorial, Recent Progress and Outlook 🔗 Ghent U., imec Challenges and prospects of 2D electronics for future monolithic CFETs 🔗 SKKU, Hanyang U. et al. A Device-Physics-Informed Artific... » read more

HW-Based Image Generation Using FTJs (SNU, Sungkyunkwan U., SK hynix et al.)


A new technical paper, "CMOS-compatible ferroelectric tunnel junctions integrate stochastic sampling and deterministic computing for image generation," was published by researchers at Seoul National University, Sungkyunkwan University, Hanyang University, Sogang University, and SK Hynix. Abstract "Recent progress in generative modeling has intensified the need for compact, energy-efficien... » read more

Chip Industry Technical Paper Roundup: Mar. 9


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations FHECore: Rethinking GPU Microarchitecture for Fully Homomorphic Encryption 🔗 Boston University, Northeastern University, KAIST, University of Murcia Heterogeneous Memory Design Exploration for AI Accelerators with a Gain Cell Memory Compiler ... » read more

Oxide-Semiconductors For Gain Cell Memory Applications (SNU, KAIST)


Researchers from Seoul National University and KAIST published “Oxide Semiconductor Gain Cell-Embedded Memory: Materials and Integration Strategies for Next Generation On-Chip Memory”. Abstract “The data processing demands of the digital era have exposed limitations in conventional memory architectures. Gain cell-embedded dynamic random-access memory based on oxide semiconductor... » read more

Chip Industry Technical Paper Roundup: Feb. 9


New technical papers recently added to Semiconductor Engineering’s library: [table id=521 /] Find more semiconductor research papers here. » read more

Overview of Interface Dipole Engineering: Formation Mechanisms, Control Methods, And Emerging Applications (SNU, Sejong U.)


Researchers at Seoul National University and Sejong University published "Interface dipole modulation for gate dielectrics in Field-Effect transistors: a review." Abstract "Interface dipole engineering has recently become a key technology in the fabrication of semiconductor FETs. This review comprehensively covers the principles, methods, and applications of interface dipoles in gate diel... » read more

Chip Industry Technical Paper Roundup: Feb. 3


New technical papers recently added to Semiconductor Engineering’s library: [table id=519 /] Find more semiconductor research papers here. » read more

MFMIS FeTFETs For Energy-Efficient, Scalable CIM Hardware Accelerators (Seoul National University)


A new technical titled "Impact of Random Phase Distribution on Ferroelectric Tunnel Field-Effect Transistors With Mitigation Strategies for Compute-in-Memory Applications" was published by researchers at Seoul National University. Abstract "This work presents, for the first time, an investigation of the impact of random phase distribution on ferroelectric (FE) tunnel field-effect transist... » read more

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