Chip Security Now Depends On Widening Supply Chain

By Ann Mutschler - 01 Aug, 2024 - Comments: 0

Securing chips is becoming more challenging as SoCs are disaggregated into chiplets, creating new vulnerabilities that involve hardware and software, as well as multiple entities, and extending threats across a much broader supply chain. In the past, much of the cyber threat model was confined to either hardware or software, and where multiple vendors were involved, various chips were separa... » read more

Chip Industry Week In Review

By The SE Staff - 05 Jan, 2024 - Comments: 0

By Susan Rambo, Jesse Allen, and Liz Allan The U.S. government will provide about $162 million in federal incentives, under the CHIPS and Science Act, to help Microchip onshore its semiconductor supply chain. The move is aimed at securing a reliable domestic supply of MCUs and mature-node chips. “Today’s announcement will help propel semiconductor manufacturing projects in Colorado and O... » read more

More Shortages Seen For Silicon Wafers

By Mark LaPedus - 16 Sep, 2021 - Comments: 0

Silicon wafer shipments have been on a torrid and record breaking pace in the first half of 2021, where demand continues to outstrip supply. So what’s in store for buyers of wafers for the remainder of 2021 and beyond? “Right now, the overall wafer pricing environment is becoming more favorable to wafer suppliers due to demand increase. Supply is getting tight and the average selling pri... » read more

Demand, Lead Times Soar For 300mm Equipment

By Mark LaPedus - 20 May, 2021 - Comments: 0

A surge in demand for various chips is causing select shortages and extended lead times for many types of 300mm semiconductor equipment, photomask tools, wafers, and other products. For the last several years, 200mm equipment has been in short supply in the market, but issues are now cropping up throughout the 300mm supply chain, as well. Traditionally, lead times have been three to six mont... » read more

More Silicon Wafer Consolidation

By Mark LaPedus - 18 Feb, 2021 - Comments: 0

The silicon wafer business typically flies under the radar, but it’s a fundamental part of the semiconductor business. Every chipmaker needs to buy silicon wafers in one size or another. In the supply chain, silicon wafer vendors produce and sell bare or raw silicon wafers to chipmakers, who in turn process them into chips. So it’s important to keep an eye on the market. Today, the s... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 08 May, 2020 - Comments: 0

Chipmakers The Trump administration has held talks with Intel and TSMC to build more leading-edge fabs in the U.S., according to the Wall Street Journal and other news outlets. IC Insights has released its rankings of the top-10 chip vendors in terms of sales for the first quarter. Intel remains in first place, followed by Samsung and TSMC. The big surprise is China-based fabless IC supplie... » read more

RF SOI Wars Begin

By Mark LaPedus - 17 May, 2018 - Comments: 2

Several foundries are expanding their fab capacities for RF SOI processes amid huge demand and shortages of this technology for smartphones. A number of foundries are increasing their 200mm RF SOI fab capacities to meet soaring demand. Then, GlobalFoundries, TowerJazz, TSMC and UMC are expanding or bringing up RF SOI processes in 300mm fabs in an apparent race to garner the first wave of RF ... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 08 Dec, 2017 - Comments: 0

Fab tools and test Four former employees at Applied Materials were charged by the U.S. for allegedly trying to steal the company’s own fab tool technology designs, according to a report from Bloomberg and others. The former employees were allegedly trying to sell the technology to a Chinese startup that would compete against Applied, according to the report. The former employees--Liang C... » read more

5 Takeaways From SEMI’s SMC

By Mark LaPedus - 21 Sep, 2017 - Comments: 0

At the recent Strategic Materials Conference (SMC), there were a multitude of presentations on a number of subjects. The event, sponsored by SEMI, had presentations on the IC industry, market drivers, electronic materials and other subjects. In no particular order, here are my five takeaways from SMC: Materials M&A mania Last year, the IC industry experienced a dizzying array of merger ... » read more

Inside Panel-Level Fan-Out Technology

By Mark LaPedus - 11 Sep, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss panel-level fan-out packaging technology with Tanja Braun, deputy group manager at the Fraunhofer Institute for Reliability and Microintegration IZM, and Michael Töpper, business development manager at Fraunhofer IZM. Braun is responsible for the Panel Level Packaging Consortium at Fraunhofer IZM, as well as the group manager for assembly and encap... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?