Hertzbleed: Prime Time For Power Side Channel Countermeasures Or Novelty Attack?

By Jasper van Woudenberg - 04 Aug, 2022 - Comments: 0

Hertzbleed is a new side-channel attack that turns a power side channel into a timing side channel. That timing side channel may be exploitable even if the algorithm runs in a constant number of clock cycles. The novel observation is that the duration of a clock cycle can vary depending on the data processed on a CPU that uses dynamic frequency scaling. This allows a remote attacker to extract... » read more

Technical Paper Round-Up: July 5

By Linda Christensen - 05 Jul, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=36 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Research Bits: June 21

By Jesse Allen - 21 Jun, 2022 - Comments: 0

Side-channel protection for edge AI Researchers from the Massachusetts Institute of Technology built a chip that can defend against power side-channel attacks targeting machine learning computations in smartwatches, smartphones, and tablets. Side-channel attacks involve observing a facet of the device's operation, in this case power, to deduce secrets. “The goal of this project is to buil... » read more

Spatial Analysis Tools & Side Channel Attacks

By Technical Paper Link - 09 May, 2022 - Comments: 0

Abstract "Practical side-channel attacks on recent devices may be challenging due to the poor quality of acquired signals. It can originate from different factors, such as the growing architecture complexity, especially in System-on-Chips, creating unpredictable and concurrent operation of multiple signal sources in the device. This work makes use of mixture distributions to formalize... » read more

Hardware Countermeasures Benchmarking against Fault Attacks

By Technical Paper Link - 18 Apr, 2022 - Comments: 0

Abstract "The development of differential fault analysis (DFA) techniques and mechanisms to inject faults into cryptographic circuits brings with it the need to use protection mechanisms that guarantee the expected level of security. The AES cipher, as a standard, has been the target of numerous DFA techniques, where its security has been compromised through different formulations and types of... » read more

Verifying Side-Channel Security Pre-Silicon

By Bryon Moyer - 03 Mar, 2022 - Comments: 1

As security grows in importance, side-channel attacks pose a unique challenge because they rely on physical phenomena that aren’t always modeled for the design verification process. While everything can be hacked, the goal is to make it so difficult that an attacker concludes it isn't worth the effort. For side-channel attacks, the pre-silicon design is the best place to address any known ... » read more

DPA Countermeasures Done Right

By Bart Stevens - 03 Mar, 2022 - Comments: 0

In the late nineties, Paul Kocher, Josh Jaffe, and Ben Jun published a paper that caused many across industry sectors to reconsider what cryptographic implementations should look like. They described an exploit wherein an adversary could extract secrets from a device by analyzing the power consumption or electromagnetic emittance from the device when it was executing cryptographic operations. S... » read more

Building A Defense In Depth Against Cyberattacks

By Bart Stevens - 03 Feb, 2022 - Comments: 0

As the number and type of cyberattacks, from the “simple and cheap” to the “expensive and sophisticated,” continues to grow at a dramatic pace, protection of chips and devices must employ a defense in depth strategy. In this way, if an attacker successfully bypasses a mechanism of protection, they’ll face another layer of defense, rather than a clear path to the assets they seek to ex... » read more

Quantifiable Assurance: From IPs to Platforms

By Technical Paper Link - 10 Jan, 2022 - Comments: 0

Abstract: "Hardware vulnerabilities are generally considered more difficult to fix than software ones because of their persistent nature after fabrication. Thus, it is crucial to assess the security and fix the potential vulnerabilities in the earlier design phases, such as Register Transfer Level (RTL), gate-level or physical layout. The focus of the existing security assessment techniques i... » read more

Security Starts With A Threat Assessment

By Bart Stevens - 06 Jan, 2022 - Comments: 0

Developing the security architecture for an electronic device begins with building a threat model wherein we ask these questions: What is the operational environment in which the device needs to function? What type of attacks can be identified? What level of access does a potential attacker have to the device? What possible attack paths can an attacker exploit? What resources (... » read more

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