tag: Siemens EDA

What’s Required To Secure Chips
By Ed Sperling - 06 Apr, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about how to verify that a semiconductor design will be secure, with Mike Borza, Synopsys scientist; John Hallman, product manager for trust and security at Siemens EDA; Pete Hardee, group director for product management at Cadence; Paul Karazuba, vice president of marketing at Expedera; and Dave Kelf, CEO of Breker Verification. ... » read more

Navigating The Intersection Of Safety And Security
By Siemens EDA - 06 Apr, 2023 - Comments: 0

Automotive ICs can be secure without needing to be safe, but a safety critical IC cannot be safe without also being secure. Addressing the intersection of safety and security in highly complex automotive SoCs is challenging even for veteran project teams. This paper focuses on how these two domains intersect, what to consider when analyzing and implementing both safety and security architect... » read more

Blog Review: April 5
By Jesse Allen - 05 Apr, 2023 - Comments: 0

Synopsys's Gordon Cooper argues that AI transformer models, initially developed for natural language processing such as translation and question answering, are starting to make inroads in the computer vision application landscape and changing the direction of deep-learning architectures. Siemens' Patrick Hope shows how to identify opportunities to optimize a PCB design through the creation o... » read more

Adding Security Into Test
By Ed Sperling - 04 Apr, 2023 - Comments: 0

Security is becoming a much bigger concern as more electronics are added into cars, as more devices are connected to the internet, and as the value of data continues to increase. The problem is that security is dynamic. It continues to change throughout the lifetime of a system, and some of these devices are expected to last for a decade or more. Lee Harrison, director of Tessent product market... » read more

Mechanical Challenges Rise With Heterogeneous Integration
By Ed Sperling - 03 Apr, 2023 - Comments: 0

Companies integrating multiple chips or chiplets into a package will need to address structural and other mechanical engineering issues, but gaps in the design tools, new materials and interconnect technologies, and a shortage of expertise are making it difficult to address those issues. Throughout most of the history of the semiconductors, few people outside of foundries worried about struc... » read more

Do Necessary Tools Exist For RISC-V Verification?
By Brian Bailey - 30 Mar, 2023 - Comments: 0

Semiconductor Engineering sat down to discuss the verification of RISC-V processors with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, senior director of alliances partner... » read more

Blog Review: March 29
By Jesse Allen - 29 Mar, 2023 - Comments: 0

Siemens' Heather George suggests adopting a shift-left strategy for complex designs that integrate multiple dies into a package and examines the challenges and opportunities for performing comprehensive tests on 2.5D and 3D IC designs. Synopsys' Shekhar Kapoor notes that when considering whether a system will perform as intended, techniques that work well for monolithic SoCs may not be as we... » read more

True 3D Is Much Tougher Than 2.5D
By Brian Bailey - 23 Mar, 2023 - Comments: 0

Creating real 3D designs is proving to be much more complex and difficult than 2.5D, requiring significant innovation in both technology and tools. While there has been much discussion about 3D designs, there are multiple interpretations about what 3D entails. This is more than just semantics, however, because each packaging option requires different design approaches and technologies. And a... » read more

The Race Toward Mixed-Foundry Chiplets
By Ann Mutschler - 23 Mar, 2023 - Comments: 1

Creating chiplets with as much flexibility as possible has captured the imagination of the semiconductor ecosystem, but how heterogeneous integration of chiplets from different foundries will play out remains unclear. Many companies in the semiconductor ecosystem are still figuring out how they will fit into this heterogeneous chiplet world and what issues they will need to solve. While near... » read more

System-on-Chip Design In The Cloud: One Size Does Not Fit All
By Nebabie Kebebew - 23 Mar, 2023 - Comments: 0

At an increasing pace, companies in the semiconductor ecosystem have started seriously considering the cloud for computing and storage. Some have migrated, and others are evaluating the cloud technology choices and are sizing the business impact and benefits to make the leap. Through key adoption reports, the cloud environment is proving to be beneficial for System-on-Chip (SoC) designers by pr... » read more

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