tag: Siemens

Partitioning Processors For AI Workloads
By Ann Mutschler - 12 Oct, 2023 - Comments: 0

Partitioning in complex chips is beginning to resemble a high-stakes guessing game, where choices need to extrapolate from what is known today to what is expected by the time a chip finally ships. Partitioning of workloads used to be a straightforward task, although not necessarily a simple one. It depended on how a device was expected to be used, the various compute, storage and data paths ... » read more

CXL: The Future Of Memory Interconnect?
By Karen Heyman - 12 Oct, 2023 - Comments: 1

Momentum for sharing memory resources between processor cores is growing inside of data centers, where the explosion in data is driving the need to be able to scale memory up and down in a way that roughly mirrors how processors are used today. A year after the CXL Consortium and JEDEC signed a memorandum of understanding (MOU) to formalize collaboration between the two organizations, suppor... » read more

Chip Industry Week In Review
By The SE Staff - 06 Oct, 2023 - Comments: 0

By Jesse Allen, Liz Allan, and Gregory Haley A potential government shutdown beginning in November would be "massively disruptive" for the Commerce Department as it continues to disburse critical funding featured in the CHIPS Act to boost semiconductor research and development in the U.S., according to Secretary Gina Raimondo. Global semiconductor industry sales totaled $44 billion in Aug... » read more

Blog Review: October 4
By Jesse Allen - 04 Oct, 2023 - Comments: 0

Cadence's Felipe Goncalves checks out the Integrity and Data Encryption (IDE) feature in PCIe 6.0, a new layer inserted between the transection layer and data link layer with the goal of protecting against threats from physical attacks on the link. Siemens' Robin Bornoff, Daniel Berger, and Kai Liu explore the potential for large language models (LLMs) make the use of CAE tools simpler, more... » read more

Everyone’s A System Designer With Heterogeneous Integration
By Ann Mutschler - 02 Oct, 2023 - Comments: 0

The move away from monolithic SoCs to heterogeneous chips and chiplets in a package is accelerating, setting in motion a broad shift in methodologies, collaborations, and design goals that are felt by engineers at every step of the flow, from design through manufacturing. Nearly every engineer is now working or touching some technology, process, or methodology that is new. And they are inter... » read more

Chip Industry Week In Review
By The SE Staff - 29 Sep, 2023 - Comments: 0

By Susan Rambo, Liz Allan, and Gregory Haley. TSMC rolled out the second version of its 3Dblox, which creates an infrastructure for stacking chiplets and other necessary components in a package, along with a standardized way of achieving that. Two novel features are chiplet mirroring for design reuse, and what is basically sandbox for power and thermal analysis of different design elements. ... » read more

ReRAM Seeks To Replace NOR
By Karen Heyman - 25 Sep, 2023 - Comments: 0

Resistive RAM is gaining renewed attention as demand for faster and cheaper non-volatile memory alternatives continues to grow, particularly in applications such as automotive. Embedded flash has long left designers wishing for better write speeds and lower energy consumption, but as the leading edge of that technology shrunk to 28nm, another problem arose. Manufacturing flash memory at thos... » read more

Chip Industry Week In Review
By The SE Staff - 15 Sep, 2023 - Comments: 0

By Gregory Haley, Jesse Allen, and Liz Allan TSMC told equipment vendors to delay deliveries of the most advanced tools due to uncertain demand, according to Reuters. The news drove down stock prices of all the major equipment providers. On the other hand, TSMC said advanced packaging shortages will constrain AI chip shipments for the next 18 months, according to NikkeiAsia. The United St... » read more

Managing P/P Tradeoffs With Voltage Droop Gets Trickier
By Ann Mutschler - 14 Sep, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about voltage droop/IR drop with Bill Mullen, distinguished engineer at Ansys; Rajat Chaudhry, product management group director at Cadence; Heidi Barnes, senior applications engineer at Keysight Technologies; Venkatesh Santhanagopalan, product manager at Movellus; Joe Davis, senior director for Calibre interfaces and mPower EM/IR... » read more

Automotive Complexity, Supply Chain Strength Demands Tech Collaboration
By Ann Mutschler - 30 Aug, 2023 - Comments: 1

The automotive supply chain is becoming more complex and collaborative, changing longstanding relationships between automakers and their suppliers in ways that would have seemed unimaginable even a couple of years ago. Rather than just developing parts for a tightly defined specification, suppliers are taking an increasingly active role in determining how various technologies are combined, w... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy