HEVC Codec Analysis: Exploring the Parallelization Features of SLX

This white paper details the results of running the parallelization features of SLX to quickly explore the HHI/ Fraunhofer reference HEVC codec implementation. The codec allows developers to make trade-offs of coding efficiency versus effective use of the parallel computation resources of the target platform. SLX is primarily used to assess the benefits of any exposed parallelism in the curr... » read more

How Many Cores? (Part 2)

New chip architectures and new packaging options—including fan-outs and 2.5D—are changing basic design considerations for how many cores are needed, what they are used for, and how to solve some increasingly troublesome bottlenecks. As reported in part one, just adding more cores doesn't necessarily improve performance, and adding the wrong size or kinds of cores wastes power. That has s... » read more