System-Level Design

Accelerating Financial Applications With SLX FPGA

Efficient, low latency algorithms have emerged as an attractive option to improve the competitiveness of forecasting in financial markets.


This white paper demonstrates how engineers creating FPGA-based hardware accelerators for financial market models can take advantage of SLX FPGA. SLX FPGA can be used to accelerate optimization efforts for financial market models targeting option pricing. In this paper, two implementations of computation intensive models for pricing options are discussed, namely the Black-Scholes and Heston pricing models. Using SLX FPGA, the implementations of these models for FPGAs are optimized while using a High-Level Synthesis (HLS) based methodology. Finally, a report is generated to compare achieved results with nonoptimized versions of the hardware accelerators created using HLS. The Heston SLX FPGA optimized implementation outperforms the non-optimized implementation by 25x. The Black-Scholes SLX FPGA optimized implementation achieves 29x improvement over the nonoptimized version.

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