Accelerate The Algorithm To Silicon Development With Stratus HLS


Growth in demand for artificial intelligence (AI) and digital signal processing (DSP) applications, coupled with advances in semiconductor process technology, drives increasingly denser SoCs. These complex SoCs further challenge the design team’s ability to meet performance, power, and area (PPA) goals within tight time-to-market windows. We need automated and targeted solutions that efficien... » read more

How 5G Is Influencing Silicon Design


5G is introducing a wide array of challenges in next-generation SoCs that go well beyond high bandwidth wireless. These include increasing system bandwidth, lowering SoC latency, and reducing power significantly for the connected internet of things. Using trusted standards-based IP and proven processing and analog IP at the most aggressive process technology nodes is needed to bring 5G to marke... » read more

Compressing Datasets Created During Silicon Design


Authors: Guru Rao, Distinguished Engineer; Shakir Abbas, Software Engineering Group Director; Mohammad Mirfendereski, Configuration Management Architect; Cadence. Harsh Sharangpani, CEO and CTO; Rajesh Patil, VP-Business Development; Ascava. During the design cycle for modern semiconductor components, a very large amount of data is generated and stored, often accumulating to hundreds of tera... » read more

Bugs That Kill


Are simulation-resistant superbugs stifling innovation? That is a question Craig Shirley, president and CEO of Oski Technology, asked a collection of semiconductor executives over dinner. Semiconductor Engineering was invited to hear that discussion and to present the key points of the discussion. To promote free conversation, the participants, who are listed below, asked not to be quoted di... » read more