Moving Software-Defined Vehicles Forward

By Ann Mutschler - 26 Jun, 2024 - Comments: 0

Experts at the Table: The automotive ecosystem is undergoing a transformation toward software-defined vehicles, spurring new architectures with more software. Semiconductor Engineering sat down to discuss the impact of these changes with Suraj Gajendra, vice president of products and solutions in Arm's automotive line of business; Chuck Alpert, R&D automotive fellow at Cadence; Steve Spadon... » read more

Chip Industry Silos Are Crimping Advances

By Brian Bailey - 11 Jan, 2024 - Comments: 0

Change is never easy, but it is more difficult when it involves organizational restructuring. The pace of such restructuring has been increasing over the past decade, and often it is more difficult to incorporate than technological advancements. This is due to the siloed nature of the semiconductor industry, both within the industry itself, and its relationship to surrounding industries. Inc... » read more

Stretching Engineers

By Brian Bailey - 22 Dec, 2020 - Comments: 1

Engineering has one constant — you innovate or fall by the wayside. That is true both for the things that are designed and for the engineers who design and build them. Today’s systems are putting new strains on engineers who can no longer be "tall and thin" or "short and fat." Those descriptions pertain to an engineer who is either highly specialized or one who has much broader experience. ... » read more

Automotive Industry On Course To Disruption And Evolution

By Doug Burcicki - 06 Feb, 2020 - Comments: 0

Consumers expect a lot from their vehicles. We expect vehicles to serve not only as transportation, but as hubs of entertainment and connectivity that can help us manage busy lives, or relax after long days. Someday, we may even expect our cars to do the driving themselves, without any human intervention. Automotive manufacturers consistently strive to meet these expectations by delivering high... » read more

Co-Design For The AI Era

By Buvna Ayyagari-Sangamalli - 17 Dec, 2019 - Comments: 0

Welcome to the second piece in our blog series examining how the computing industry can work in new ways to enable the AI Era. In our first blog, my colleague Ellie Yieh described the enormous opportunities and challenges facing the industry as we enter a new decade, and she offered a path for accelerating innovation—from materials to systems—based on a “New Playbook” for driving im... » read more

Changes In Data Storage and Usage

By Ed Sperling - 09 Oct, 2019 - Comments: 0

Doug Elder, vice president and general manager of OptimalPlus, talks about what’s changing in the storage and collection, including using data lakes and data engineering to break down silos and get data into a consistent format, and why it’s essential to define data up front based upon how quickly it needs to be accessed, as well as who actually owns the data. » read more

Improving Quality Through Data Analytics

By Ed Sperling - 11 Sep, 2019 - Comments: 0

Doug Elder, vice president and general manager at OptimalPlus, explains how to utilize data to improve reliability, how it applies to different manufacturing processes, and what happens when that data is made available to more people within an organization. » read more

Secret Sauce To Make Design Reuse A Reality

By Ranjit Adhikary - 04 May, 2017 - Comments: 0

In a globally competitive landscape, IP reuse and effective team collaboration play a crucial role in product success. But if one considers the complex dynamics of all the recent advances in technology, the insatiable appetite for consumer electronics coupled with the design cost and time-to-market pressures on designers, one would not be unjustified in assuming that the problem of design reuse... » read more

Fix Processes, Then Silos

By Ed Sperling - 09 Feb, 2017 - Comments: 0

Jack Welch, former CEO of GE, was a big proponent of what he called a "boundaryless corporation." It was a good sound bite, but it pales in comparison to former Intel CEO Andy Grove's philosophy of working out of a cubicle, just like the rest of his staff. While it's great to have corporate buy-in for breaking down silos, which are vertically integrated, the real problem for semiconductor c... » read more

New Business Model: Flexible Silos

By Ed Sperling - 22 May, 2014 - Comments: 0

Operational silos within organizations have a long history of streamlining processes and maximize efficiency. In fact, that approach has made enterprise resource planning applications a must-have for most companies, and cemented the fortunes of giants such as SAP and Oracle, as well as the giant consulting companies that recommend them. But those kinds of delineations don’t work so well fo... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?