A Complete System-Level Security Verification Methodology


Hardware is at the root of all digital systems, and security must be considered during the system-on-chip (SoC) design and verification process. Verifying the security of an SoC design is challenging because of time to market pressure and resource constraints. Resources allocated to the already time-consuming task of functional verification must be diverted to security verification, which requi... » read more

The Essential Tool Kit


By Ann Steffora Mutschler Is there an essential chip design tool kit today that has only the ‘must haves?’ Sure, this sounds like a straightforward question, but the answer really depends on what process node the design will be manufacturing on. According to Jon McDonald, technical marketing engineer for the design and creation business at Mentor Graphics, there’s actually nothi... » read more