Using Formal Verification To Evaluate The HW Reliability Of A RISC-V Ibex Core In The Presence Of Soft Errors


A technical paper titled “Using Formal Verification to Evaluate Single Event Upsets in a RISC-V Core” was published by researchers at University of Southampton. Abstract: "Reliability has been a major concern in embedded systems. Higher transistor density and lower voltage supply increase the vulnerability of embedded systems to soft errors. A Single Event Upset (SEU), which is also calle... » read more

Radiation-Hardened Non-Volatile Magnetic Latch That Tolerates SNUs and DNUs


A research paper titled "A Radiation-Hardened Non-Volatile Magnetic Latch with High Reliability and Persistent Storage" was published by researchers at Anhui University, Hefei University of Technology, LIRMM, and Kyutech. According to the abstract: "Based on an advanced triple-path dual-interlocked-storage-cell (TPDICE) and MTJs, this paper proposes a radiation-hardened non-volatile magneti... » read more

Simulation-Based Fault Analysis for Resilient System-On-Chip Design


Abstract: "Enhancing the reliability of the system is important for recent system-on-chip (SoC) designs. This importance has led to studies on fault diagnosis and tolerance. Fault-injection (FI) techniques are widely used to measure the fault-tolerance capabilities of resilient systems. FI techniques suffer from limitations in relation to environmental conditions and system features. Moreover,... » read more