tag: software-driven verification

Software-Driven Verification (Part 3)
By Brian Bailey - 10 Feb, 2015 - Comments: 0

[getkc id="10" comment="Functional Verification"] has been powered by tools that require hardware to look like the kinds of systems that were being designed two decades ago. Those limitations are putting chips at risk and a new approach to the problem is long overdue. Semiconductor Engineering sat down with Frank Schirrmeister, group director, product marketing for System Development Suite at [... » read more

Software-Driven Verification (Part 2)
By Brian Bailey - 05 Jan, 2015 - Comments: 0

[getkc id="10" comment="Functional Verification"] has been powered by tools that require hardware to look like the kinds of systems that were being designed two decades ago. Those limitations are putting chips at risk and a new approach to the problem is long overdue. Semiconductor Engineering sat down with Frank Schirrmeister, group director, product marketing for System Development Suite at [... » read more

Industry Scorecard For 2014
By Brian Bailey - 22 Dec, 2014 - Comments: 0

At the end of last year, Semiconductor Engineering asked the industry about the developments they expected to see in 2014. If you care to refresh your memory, they were categorized under markets, semiconductors and development tools. Now it is time to look back and see how accurate those predictions were and where they fell short. Part one addressed the market and semiconductor areas and in thi... » read more

And the Winner is…
By Brian Bailey - 18 Dec, 2014 - Comments: 0

Semiconductor Engineering now has its first full year under its belt, and I have to say it has been an incredible year. Not only did we exceed a million page views in our first year, but we also got started on the Knowledge Center, an endeavor the likes of which has never been attempted in our industry. It is still very young and has a lot of growing up to do, but it is a wonderful start. We wo... » read more

Software-Driven Verification (Part 1)
By Brian Bailey - 18 Dec, 2014 - Comments: 1

[getkc id="10" comment="Functional Verification"] has been powered by tools that require hardware to look like the kinds of systems that were being designed two decades ago. Those limitations are putting chips at risk and a new approach to the problem is long overdue. Semiconductor Engineering sat down with Frank Schirrmeister, group director, product marketing for System Development Suite at [... » read more

The Great Shift To The Left
By Frank Schirrmeister - 27 Mar, 2014 - Comments: 1

Writing this while I am at DATE in Dresden, Germany, I am also preparing for two panels on system-level trends later today and one on software-driven verification tomorrow. I am also visiting partners and customers to discuss our current and planned technologies. A while ago I had augmented “Leibson’s Law” stating that it takes 10 years for any disruptive technology to be adopted by desig... » read more

Big Shift In SoC Verification
By Ed Sperling - 17 Mar, 2014 - Comments: 2

Semiconductor Engineering sat down to discuss software-driven verification with Ken Knowlson, principal engineer at Intel; Mark Olen, product manager for the Design Verification Technology Division of Mentor Graphics; Steve Chappell, senior manager for CAE technology and verification at Synopsys; Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadenc... » read more

Big Shift In SoC Verification
By Ed Sperling - 06 Mar, 2014 - Comments: 5

Semiconductor Engineering sat down to discuss software-driven verification with Ken Knowlson, principal engineer at Intel; Mark Olen, product manager for the Design Verification Technology Division of Mentor Graphics; Steve Chappell, senior manager for CAE technology and verification at Synopsys; Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadenc... » read more

Top 5 Trends For 2014
By Frank Schirrmeister - 19 Dec, 2013 - Comments: 0

My daughter’s and my traditional yearly cookie baking party last weekend reminded me of two things: There is still no easy recipe for system design and verification and – of course – the year is almost over again. Ouch. Let’s look back at 2013 first. Earlier this year we held a System to Silicon Verification Summit in San Jose, with an interesting technical keynote by Brian Bailey an... » read more

The Week In Review: July 19
By Ed Sperling - 19 Jul, 2013 - Comments: 0

By Ed Sperling Synopsys rolled out a 28nm data converter IP portfolio for analog-to-digital and digital-to-analog converters, as well as integrated PLLs. Synopsys says the new architecture saves up to 76% of the power and 86% of area. Mentor Graphics added intelligent software-driven verification to its functional verification platform. New is the ability to automatically generate embedded ... » read more

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