Analog Creates Ripples in Digital Verification


We live in an analog world, but analog has been minimized whenever possible. At some point digital and analog must come together in every electronic device, and that has long been an area where errors creep in. The Wilson Research Group and Siemens EDA functional verification study has long shown that analog and mixed signal are two of the highest causes of flaws that result in chip respins.... » read more

An Inside Look At UPF 4.0


Energy and power efficiency are increasingly important in today’s products, and the additional complexity in new architectures to incorporate competitive power management schemes has magnified the need for newer and better methodologies for the verification, implementation, and reuse of power intent specifications. This is the focus of the new IEEE 1801-2024 Unified Power Format (UPF) 4.0 ... » read more

Advanced Packaging Moving At Breakneck Pace


Experts at the Table: Semiconductor Engineering sat down to discuss advances in packaging with Michael Kelly, vice president of Chiplets and FCBGA Integration at Amkor; William Chen, fellow at ASE; Dick Otte, CEO of Promex Industries; and Sander Roosendaal, R&D director at Synopsys Photonics Solutions. What follows are excerpts of that discussion. [Part 2 of the discussion is here.] ... » read more

How Ultra Ethernet And UALink Enable High-Performance, Scalable AI Networks


By Ron Lowman and Jon Ames AI workloads are significantly driving innovation in the interface IP market. The exponential increase in AI model parameters, doubling approximately every 4-6 months, stands in stark contrast to the slower pace of hardware advancements dictated by Moore's Law, which follows an 18-month cycle. This discrepancy demands hardware innovations to support AI workloads, c... » read more

Industry Standards For Chiplets And Their Role In Test


As the semiconductor industry increasingly moves to chiplets, 2.5D/3D packaging, and heterogeneous integration, there are significant new challenges for test. Leaders like Teradyne have the technologies necessary to respond and innovate, but to keep the industry running smoothly, we need effective collaboration, and that demands standardization. Source: Arizona State University There ... » read more

Edge And IoT Security Turning A Corner


Security is beginning to improve for a wide range of IoT and edge devices due to better tools, the implementation of new standards and methodologies, and an increasing level of collaboration and communication across different market segments that in the past had little or no interaction. Until recently, many vendors in cost-sensitive markets offered the bare minimum of security. To make matt... » read more

Matter 1.4 Advancements In The Smart Home


Recently the Connectivity Standards Alliance (CSA) announced the updated Matter 1.4 specification.  This new release shows the smart home business community's continued discipline in maintaining this release schedule for developers and manufacturers as Matter adoption grows and becomes more successful in the smart home space. This update includes normal bug fixes,  multiple feature enhance... » read more

RISC-V Profiles Help Conformance


Experts At The Table: What's needed to be able to trust that a RISC-V implementation will work as expected across multiple designs using standard OSes. Semiconductor Engineering discussed the issue with John Min, vice president of customer service at Arteris; Zdeněk Přikryl, CTO of Codasip; Neil Hand, director of marketing at Siemens EDA (at the time of this discussion); Frank Schirrmeist... » read more

Barriers To Chiplet Sockets


Experts At The Table: Demand for chiplets is growing, but debate continues about whether standards and general-purpose chiplets will kick-start the commercialization boom, or whether success will come through customization of those chiplets. Semiconductor Engineeering sat down to discuss these and other related issues with Elad Alon, CEO of Blue Cheetah; Mark Kuemerle, vice president of technol... » read more

Enabling Innovative Multi-Vendor Chiplet-Based Designs


Chiplets have emerged as a critical implementation paradigm for semiconductor products, primarily because they can deliver cost benefits relative to a non-chiplet-based approach. The first, most well-proven, and obvious benefit of a chiplet-based approach is manufacturing cost. Manufacturing cost benefits are accrued either from the appropriate selection of chiplet die size, or by optimizin... » read more

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