tag: subsystems

Higher Density, More Data Create New Bottlenecks In AI Chips
By Adam Kovac - 12 Sep, 2024 - Comments: 0

Data movement is becoming a bigger problem at advanced nodes and in advanced packaging due to denser circuitry, more physical effects that can affect the integrity of signals or the devices themselves, and a significant increase in data from AI and machine learning. Just shrinking features in a design is no longer sufficient, given the scaling mismatch between SRAM-based L1 cache and digital... » read more

Preparing For Commercial Chiplets
By Ed Sperling - 24 Aug, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the path to commercialization of chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts of tha... » read more

An Ideal Architecture For Always-On Camera Subsystems
By Expedera - 23 Aug, 2023 - Comments: 0

Always-sensing camera implementations offer a wealth of user experience advantages but face significant power, latency, and privacy concerns if not done right. To be successful, always-sensing camera subsystems must be architected to preserve battery life and to ensure privacy and security while delivering key user experience improvements. In a joint white paper with Rambus, Expedera discuss... » read more

Making IP Friendlier
By Brian Bailey - 27 Dec, 2018 - Comments: 2

Semiconductor Engineering sat down to discuss IP tracking and management with Ranjit Adhikary, vice president of marketing for ClioSoft; Jim Bruister, director digital systems (since retired) at Silvaco; Marc Greenberg, product marketing group director at Cadence; and Kelvin Low, vice president of marketing at Arm. What follows are excerpts from that conversation. Part one can be found here. ... » read more

The Chiplet Option
By Ed Sperling - 09 Oct, 2017 - Comments: 0

All of the leading chipmakers, foundries and OSATs are now working with some sort of advanced packaging. The next step is to add some consistency to those efforts to be able to assemble chips much more quickly and inexpensively. DARPA has been promoting chiplets as the best way to solve this problem, and for the military, this is a pretty logical choice. With a push toward heterogeneity in c... » read more

Prototyping Building Blocks
By Tom De Schutter - 28 Sep, 2017 - Comments: 0

Lego has existed for 85 years. The company was founded August 10, 1932, and after all these years, the concept of building structures big and small still hasn’t lost any of its charm. For my children, now 10 and 12, it is probably the most played with toy throughout their childhood. As with any new purchase, they initially and carefully build the specific design for the instructions included ... » read more

Systems Of Packages
By Ed Sperling - 11 Sep, 2017 - Comments: 0

The shift from IP blocks to subsystems, with pre-integrated and pre-verified IP, has never lived up to the initial hype. That doesn't mean the concept isn't valid, though. The problem with subsystems, as originally conceived, is they were far too limited for widespread adoption. When this idea first began surfacing in the early pat of the Millennium, this all made sense because the number o... » read more

How To Build An IoT Chip
By Ed Sperling - 07 Sep, 2017 - Comments: 1

Semiconductor Engineering sat down to discuss IoT chip design issues with Jeff Miller, product marketing manager for electronic design systems in the Deep Submicron Division of [getentity id="22017" e_name="Mentor, a Siemens Business"]; Mike Eftimakis, IoT product manager in [getentity id="22186" comment="ARM"]'s Systems and Software Group; and John Tinson, vice president of sales at Sondrel Lt... » read more

IP Challenges Ahead
By Brian Bailey - 10 Aug, 2017 - Comments: 0

The revenue from semiconductor [getkc id="43" kc_name="IP"] has risen steadily to become the largest segment of the EDA industry. Industry forecasts expect it to keep growing at a CAGR of more than 10% for the next decade. Part one of this article examined the possibility those forecasts are wrong and that large semiconductor companies are likely to start bringing IP development back in hous... » read more

Bridging The IP Divide
By Brian Bailey - 14 Apr, 2016 - Comments: 0

The adoption of an IP-based model has enabled designs to keep filling the available chip area while allowing design time to shrink. But there is a divide between IP providers and IP users. It is an implicit fuzzy contract about how the IP should be used, what capabilities it provides, and the extent of the verification that has been performed. IP vendors have been trying to formalize this as mu... » read more

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