tag: Synopsys

Blog Review: June 2
By Jesse Allen - 02 Jun, 2021 - Comments: 0

Synopsys' Mike Borza checks out how automotive ECUs, infotainment systems, and in-vehicle networks can be compromised by attackers and why it’s important to follow cybersecurity best practices and keep security in mind starting early in the design cycle. Cadence's Paul McLellan checks out the results from the latest MLPerf benchmarks for machine learning inference systems, with the new inc... » read more

Week In Review: Design, Low Power
By Jesse Allen - 28 May, 2021 - Comments: 0

Valens Semiconductor will become a publicly traded company on NYSE as VLN after a merger with PTK Acquisition Corp. Valens provides long-reach, high-speed video and data transmission for the audio-video and automotive industries. The transaction is expected to provide proceeds of approximately $240 million, including up to $115 million in trust from PTK Acquisition Corp. (assuming no redemption... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 28 May, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back Cadence announced it has found a cost-conscience way to scale capacity for 3D electromagnetic (EM) simulations using a hybrid cloud consisting of local computing resources and cloud services from Amazon Web Service (AWS). Data stays safe on the local resources, and, if more computing resources are needed, encrypted simulation-spec... » read more

AI Testing: Pushing Beyond DFT Architectures
By Rahul Singhal - 27 May, 2021 - Comments: 0

Every day, more applications are deploying artificial intelligence (AI) system to increase automation beyond traditional systems. The continuous growth in computing demands of AI systems require designers to develop massive, highly parallel AI processor chips. Their large sizes and types of applications have a significant impact on their design and test methodologies. With thousands of repeated... » read more

Do We Have An IC Model Crisis?
By Brian Bailey - 27 May, 2021 - Comments: 0

Models are critical for IC design. Without them, it's impossible to perform analysis, which in turn limits optimizations. Those optimizations are especially important as semiconductors become more heterogenous, more customized, and as they are integrated into larger systems, creating a need for higher-accuracy models that require massive compute power to develop. But those factors, and other... » read more

Pushing The Limits Of Hardware-Assisted Verification
By Ann Mutschler - 27 May, 2021 - Comments: 0

As semiconductor complexity continues to escalate, so does the reliance on hardware-assisted simulation, emulation, and prototyping. Since chip design first began, engineers have complained their design goals exceeded the capabilities of the tools. This is especially evident in verification and debug, which continue to dominate the design cycle. Big-iron tooling has enabled design teams to k... » read more

Scaling Simulation
By Brian Bailey - 27 May, 2021 - Comments: 1

Without functional simulation the semiconductor industry would not be where it is today, but some people in the industry contend it hasn't received the attention and research it deserves, causing a stagnation in performance. Others disagree, noting that design sizes have increased by orders of magnitude while design times have shrunk, pointing to simulation remaining a suitable tool for the job... » read more

Blog Review: May 26
By Jesse Allen - 26 May, 2021 - Comments: 0

Cadence's Paul McLellan checks out challenges in designing processors for AI applications, the explosion in the number of weights used to language processing, and the current state of training and inference hardware. Synopsys' Mike Gianfagna explores how hyper-convergent design will push device capabilities through integration of multiple technologies, multiple protocols, and multiple archit... » read more

Next-Gen SerDes Roadmap
By Ed Sperling - 25 May, 2021 - Comments: 0

An explosion in data is causing a series of successive bottlenecks in the data center. Priyank Shukla, product marketing manager for high-speed SerDes IP at Synopsys, digs into the performance roadmap for moving data within server racks and between different racks, where the bottlenecks are today, and how they will be addressed in the future. Related SerDes Knowledge Center Top stories... » read more

The Increasingly Uneven Race To 3nm/2nm
By Mark LaPedus and Ed Sperling - 24 May, 2021 - Comments: 2

Several chipmakers and fabless design houses are racing against each other to develop processes and chips at the next logic nodes in 3nm and 2nm, but putting these technologies into mass production is proving both expensive and difficult. It's also beginning to raise questions about just how quickly those new nodes will be needed and why. Migrating to the next nodes does boost performance an... » read more

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