tag: Synopsys

Week In Review: Manufacturing, Test
By Ed Sperling - 17 Jun, 2022 - Comments: 0

Node scaling wars are revving up, although much of the action is happening where most people can't see it — inside of research labs. This is difficult stuff, which makes delivery dates difficult to pinpoint, and no one wants to give away their competitive position or commit to a timeline they can't keep. Billions of dollars of leading-edge research — funded by pure-play foundry TSMC, IDM... » read more

Week In Review: Design, Low Power
By Jesse Allen - 17 Jun, 2022 - Comments: 0

Tools, design, chips Altair, a provider of software and cloud services for CAE, HPC, simulation, and data analysis, acquired Concept Engineering, a provider of automatic schematic generation tools, electronic circuit and wire harness visualization platforms that provide on-the-fly visual rendering, and electronic design debug solutions. “Concept Engineering’s advanced, reactive visualizati... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 17 Jun, 2022 - Comments: 0

Automotive, mobility U.S. National Highway Traffic Safety Administration (NHTSA) release its first crash reports from ADAS (advanced driver assistance systems, i.e., SAE Level 2) and ADS (automated driving systems, i.e., SAE Levels 3-5).  The systems had to be in use at least 30 seconds before the crash in order for it to be reportable. The car may have had the system turned off at the time ... » read more

Variation Making Trouble In Advanced Packages
By Ed Sperling - 16 Jun, 2022 - Comments: 2

Variation is becoming increasingly problematic as chip designs become more heterogeneous and targeted by application, making it difficult to identify the root cause of problems or predict what can go wrong and when. Concerns about variation traditionally have been confined to the most advanced nodes, where transistor density is highest and where manufacturing processes are still being fine-t... » read more

Blog Review: June 15
By Jesse Allen - 15 Jun, 2022 - Comments: 0

Ansys' Vidyu Challa considers common primary, or single-use, battery chemistries and how they affect that many important cell properties, such as energy density, flammability and safety, available cell constructions, temperature range, and shelf life. Synopsys' Rimpy Chugh and Rohit Kumar Ohlayan discuss some of the challenges arising from static linting of code, shifting linting left in the... » read more

Audio, Visual Advances Intensify IC Design Tradeoffs
By Ann Mutschler - 13 Jun, 2022 - Comments: 0

A spike in the number of audio and visual sensors is greatly increasing design complexity in chips and systems, forcing engineers to make tradeoffs that can affect performance, power, and cost. Collectively, these sensors generate so much data that designers must consider where to process different data, how to prioritize it, and how to optimize it for specific applications. The tradeoffs in... » read more

DRAM Thermal Issues Reach Crisis Point
By Karen Heyman - 09 Jun, 2022 - Comments: 5

Within the DRAM world, thermal issues are at a crisis point. At 14nm and below, and in the most advanced packaging schemes, an entirely new metric may be needed to address the multiplier effect of how thermal density increasingly turns minor issues into major problems. A few overheated transistors may not greatly affect reliability, but the heat generated from a few billion transistors does.... » read more

IP Industry Transformation
By Brian Bailey - 09 Jun, 2022 - Comments: 0

The design IP industry is developing an assortment of new options and licensing schemes that could affect everything from how semiconductor companies collaborate to how ICs are designed, packaged, and brought to market. The IP market already has witnessed a sweeping shift from a "design once, use everywhere" approach, to an "architect once, customize everywhere" model, in which IP is highly ... » read more

Bringing RFIC Design And Verification Into The Modern Era
By Jian Yang - 09 Jun, 2022 - Comments: 0

For decades, developers of radio frequency (RF) chips and other analog/mixed-signal (AMS) integrated circuits (ICs) have used traditional techniques for design and verification. Most RFIC designers have continued to hand-craft active and passive devices, manually place and route their circuits, and rely on the bring-up lab to validate their pre-silicon SPICE simulations. It is often said that a... » read more

Co-Packaged Optics In The Data Center
By Ed Sperling - 08 Jun, 2022 - Comments: 0

Just because faster Ethernet is added to the data center doesn’t mean existing hardware can utilize it efficiently. Scott Durrant, strategic marketing manager at Synopsys, talks with Semiconductor Engineering about the rapid rollout of faster Ethernet rates, problems in moving data to the front module of the switch and how much energy is required, and what optical technology can bring to the ... » read more

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