tag: Synopsys

Verification In The Cloud
By Ed Sperling - 27 Jun, 2019 - Comments: 0

Christen Decoin, senior director of business development at Synopsys, talks with Semiconductor Engineering about what’s changed for EDA in the cloud, why it has taken so long, and what new benefits the cloud will offer. Rules have changed at foundries, and the customer base for designs is evolving. » read more

Top Considerations For Evaluating The Tech In Tech M&A
By Synopsys - 26 Jun, 2019 - Comments: 0

M&A is high stakes. With thousands of transactions and billions of dollars spent on technology mergers and acquisitions every year, acquirers must protect their investments by conducting due diligence. This white paper discusses: Risks you may encounter in an M&A transaction involving software; How to evaluate these risks using a multifaceted evaluation model; What to look... » read more

Will Open-Source EDA Work?
By Kevin Fogarty - 26 Jun, 2019 - Comments: 4

Open-source EDA is back on the semiconductor industry's agenda, spurred by growing interest in open-source hardware. But whether the industry embraces the idea with enough enthusiasm to make it successful is not clear yet. One of the key sponsors of this effort is the U.S. Defense Advanced Research Projects Agency (DARPA), which is spearheading a number of programs to lower the cost of chip ... » read more

Blog Review: June 26
By Jesse Allen - 26 Jun, 2019 - Comments: 0

Arm's Krish Nathella and Dam Sunwoo dig into research to make a practical implementation of a temporal data prefetcher that overcomes the huge on- and off-chip storage and traffic overheads usually associated with them. Cadence's Paul McLellan notes that while concerns about uncover bias in computer vision algorithms usually focus on people, a team at Facebook found that object recognition t... » read more

Wrestling With High-Speed SerDes
By Ann Mutschler - 19 Jun, 2019 - Comments: 2

SerDes has emerged as the primary solution in chips where there is a need for fast data movement and limited I/O, but this technology is becoming significantly more challenging to work with as speeds continue to rise to offset the massive increase in data. A Serializer/Deserializer is used to convert parallel data into serial data, allowing designers to speed up data communication without h... » read more

Blog Review: June 19
By Jesse Allen - 19 Jun, 2019 - Comments: 0

Mentor's Rebecca Lord digs into signal integrity complications and why today's high frequency signals make it important to understand the physics of transmission lines. Cadence's Meera Collier points to the need to recognize diversity and nuance when compiling AI training datasets and avoid the oversimplification that can lead to bias. Synopsys' Deepak Nagaria checks out the new features ... » read more

Week in Review: IoT, Security, Auto
By Jeff Dorsch - 14 Jun, 2019 - Comments: 0

Products/Services Mentor, a Siemens Business, announced the release of the final phase of the Valor software New Product Introduction design-for-manufacturing technology, automating printed circuit board design reviews. The company has integrated DFM technology into the Xpedition software layout application. Arteris IP reports that Toshiba has taped out its next-generation advanced driv... » read more

Week In Review: Design, Low Power
By Jesse Allen - 14 Jun, 2019 - Comments: 0

M&A Intel will acquire Barefoot Networks, a maker of programmable Ethernet switch silicon and the P4 networking programming language for data centers. Founded in 2013, the Santa Clara-based company has raised $155.4 million in funding. Terms of the deal were not disclosed, but Intel expects the acquisition to be final in the third quarter of this year. Tools & IP Mentor extended it... » read more

Building Your First Chip For Artificial Intelligence? Read This First
By Ron Lowman - 13 Jun, 2019 - Comments: 0

As artificial intelligence (AI) capabilities enter new markets, the IP selected for integration provides the critical components of the AI SoC. But beyond the IP, designers are finding a clear advantage in leveraging AI expertise, services, and tools to ensure the design is delivered on time, with a high level of quality and value to the end customer for new and innovative applications. Over... » read more

Waiting For Chiplet Interfaces
By Brian Bailey - 13 Jun, 2019 - Comments: 0

There aren't many success stories related to chiplets today for a very simple reason—there are few standard interfaces defined for how to connect them. In fact, the only way to use them is to control both sides of the interface with a proprietary interface and protocol. The one exception is the definition of HBM2, which enables large quantities of third-party DRAM to be connected to a logi... » read more

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