Integration Hurdles For Analog And RF In Next-Gen Packages


A rapid increase in wireless connectivity and more sensors, coupled with a shift away from monolithic SoCs toward heterogeneous integration, is driving up the amount of analog/RF content in systems and changing the dynamics within a package. Since the early 2000s, the majority of chips used at the most advanced nodes were systems-on-chip (SoCs). All features had to fit into a single planar S... » read more

Accelerating Innovation With An E-Beam Lithography System


By Al Blais and Johnny Yeap Traditional lithography remains a standard in the industry, providing precision and a relatively cost-effective way to create patterns on the wafer when producing very high volumes of chips. However, cycle times can be long depending on the complexity of the masks that must be made. The emergence of maskless e-beam lithography is providing a complementary path ... » read more

Blog Review: May 22


Cadence's Sree Parvathy introduces Verilog-A, a high-level language that uses modules to describe the structure and behavior of analog systems and enables the top-down system to be defined before the actual transistor circuits are assembled. Siemens' Keith Felton suggests the process of package substrate design is improved by leveraging the collective expertise of multiple design domain spec... » read more

Chip Aging Becoming Key Factor In Data Center Economics


Chip aging is becoming a much bigger concern inside of data centers, where it can impact server uptime, utilization rates, and the amount of energy needed to drive signals and cool entire server racks. Aging in chips is the result of both higher logic utilization and increasing transistor density. This is problematic for data centers, in general, but especially for AI chips where digital log... » read more

Chip Industry Week In Review


President Biden will raise the tariff rate on Chinese semiconductors from 25% to 50% by 2025, among other measures to protect U.S. businesses from China’s trade practices. Also, as part of President Biden’s AI Executive Order, the Administration released steps to protect workers from AI risks, including human oversight of systems and transparency about what systems are being used. Intel ... » read more

How To Successfully Deploy GenAI On Edge Devices


Generative AI (GenAI) burst onto the scene and into the public’s imagination with the launch of ChatGPT in late 2022. Users were amazed at the natural language processing chatbot’s ability to turn a short text prompt into coherent humanlike text including essays, language translations, and code examples. Technology companies – impressed with ChatGPT’s abilities – have started looking ... » read more

Running More Efficient AI/ML Code With Neuromorphic Engines


Neuromorphic engineering is finally getting closer to market reality, propelled by the AI/ML-driven need for low-power, high-performance solutions. Whether current initiatives result in true neuromorphic devices, or whether devices will be inspired by neuromorphic concepts, remains to be seen. But academic and industry researchers continue to experiment in the hopes of achieving significant ... » read more

Power/Performance Costs In Chip Security


Hackers ranging from hobbyists to corporate spies and nation states are continually poking and prodding for weaknesses in data centers, cars, personal computers, and every other electronic device, resulting in a growing effort to build security into chips and electronic systems. The current estimate is that 60% of chips and systems have some type of security built in, and that percentage is ... » read more

Securing The World’s Data: A Looming Challenge


A combination of increasingly complex designs, more connected devices, and a mix of different generations of security technology are creating a whole new set of concerns about the safety of data nearly everywhere. While security experts have been warning of a growing threat in electronics for decades, there have been several recent fundamental changes that elevate the risk. Among them: ... » read more

Blog Review: May 15


Cadence's Anika Sunda suggests that RISC-V has opened numerous doors for innovation and believes EDA tools can help bridge the knowledge gap and foster a growing community of RISC-V developers. Synopsys' Alessandra Costa chats with industry experts about challenges facing analog design, what's needed for multi-die designs, and the potential of AI. Siemens' Bill Ji explains why understandi... » read more

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