CXL: The Future Of Memory Interconnect?


Momentum for sharing memory resources between processor cores is growing inside of data centers, where the explosion in data is driving the need to be able to scale memory up and down in a way that roughly mirrors how processors are used today. A year after the CXL Consortium and JEDEC signed a memorandum of understanding (MOU) to formalize collaboration between the two organizations, suppor... » read more

How Multi-Die Systems Are Transforming Electronic Design


How can the electronics industry continue as Moore’s law slows, system complexity increases, and the number of transistors balloons to trillions? Multi-die systems have emerged as the solution to go beyond Moore’s law and address the challenges of systemic complexity, allowing for accelerated, cost-effective scaling of system functionality, reduced risk and time to market, lower system p... » read more

Issues In Calculating Glitch Power


The amount of power consumed by redundant non-functional toggles, or glitch power, can be as high as 35% of total power consumption in a design. What can be done about that? Godwin Maben, low-power architect and scientist at Synopsys, takes a deep dive into the causes of glitch, how it is affected by new process nodes and heterogeneous integration, and the impact of different workloads, higher ... » read more

Blog Review: October 11


Cadence's Sangeeta Soni examines Integrity and Data Encryption (IDE) verification considerations for Compute Express Link (CXL) devices, including MAC generation and handling, key programming and exchange, and early MAC termination. Synopsys' Madhumita Sanyal points to how the increased bandwidth of PCIe 6.0 supports the demanding requirements of AI accelerators. Siemens' Kevin Webb expla... » read more

Using Smart Data To Boost Semiconductor Reliability


The chip industry is looking to AI and data analytics to improve yield, operational efficiency, and reduce the overall cost of designing and manufacturing complex devices. In fact, SEMI estimates its members could capture more than $60B in revenues associated through smart data use and AI. Getting there, however, requires overcoming a number of persistent obstacles. Smart data utilization is... » read more

Importance Of Certifications In Automotive IP


The automotive industry is renowned for its unwavering commitment to enforcing strict standards for enabling safety, quality, reliability, and security. However, upholding stringent measures to ensure vehicle safety and reliability has led to the need for predictive maintenance i.e., using advanced monitoring and analytical techniques as a part of Silicon Lifecycle Management (SLM) to anticipat... » read more

How Much AI Is Really Needed?


Tensor Core GPUs have created a generative AI model gold rush. Whether it’s helping students with math homework, planning a vacation, or learning to prepare a six-course meal, generative AI is ready with answers. But that's only one aspect of AI, and not every application requires it. AI — now an all-inclusive term, referring to the process of using algorithms to learn, predict, and make... » read more

Higher Automotive MCU Performance With Interface IP


By Ron DiGuiseppe and Hezi Saar AI is making waves across many industries, and automotive is no exception. Today’s vehicles are smarter and more connected than ever, and AI is at the heart of it all. Many new advanced driver assistance system (ADAS) applications, such as automatic emergency braking, adaptive cruise control, and lane-keeping assistance, are built using the latest AI algorit... » read more

How Quickly Will Multi-Die Systems Change Semiconductor Design?


For many decades, semiconductor design and implementation has been focused on monolithic, ever-larger and more complex single-chip implementation. This system-on-chip approach is now changing for a variety of reasons. The new frontier utilizes many chips assembled in new ways to deliver the required form-factor and performance. Multi-die systems are paving the way for new types of semiconduc... » read more

Blog Review: October 4


Cadence's Felipe Goncalves checks out the Integrity and Data Encryption (IDE) feature in PCIe 6.0, a new layer inserted between the transection layer and data link layer with the goal of protecting against threats from physical attacks on the link. Siemens' Robin Bornoff, Daniel Berger, and Kai Liu explore the potential for large language models (LLMs) make the use of CAE tools simpler, more... » read more

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