tag: Synopsys

Reducing Chip Test Costs With AI-Based Pattern Optimization
By Rahul Singhal - 31 Jul, 2023 - Comments: 0

The old adage “time is money” is highly applicable to the production testing of semiconductor devices. Every second that a wafer or chip is under test means that the next part cannot yet be tested. The slower the test throughput, the more automatic test equipment (ATE) is needed to meet production throughput demands. This is a huge issue for chip producers, since high pin counts, blazingly ... » read more

Week In Review: Design, Low Power
By Susan Rambo - 28 Jul, 2023 - Comments: 0

Arm is helping to address the ongoing talent shortage through its newly announced Semiconductor Education Alliance, with a long list of partners, including Arduino, Cadence, Cornell University, Semiconductor Research Corp., STMicroelectronics,Synopsys, Taiwan Semiconductor Research Institute, the All-India Council for Technical Education, and the University of Southampton. The Alliance... » read more

Shift Left, Extend Right, Stretch Sideways
By Brian Bailey - 27 Jul, 2023 - Comments: 0

The EDA industry has been talking about shift left for a few years, but development flows are now being stretched in two additional ways, extending right to include silicon lifecycle management, and sideways to include safety and security. In addition, safety and security join verification and power as being vertical concerns, and we are increasingly seeing interlinking within those concerns. ... » read more

The Good And Bad Of Chip Design On Cloud
By Ann Mutschler - 27 Jul, 2023 - Comments: 0

Semiconductor Engineering sat down to talk about how the shift toward chip design on cloud has sped up, whether the benefits of cloud are realized in chip design, and some of the most pressing challenges to chip design on cloud today, with Philip Steinke, fellow, CAD infrastructure and physical design at AMD; Mahesh Turaga, vice president of business development for cloud at Cadence Design Syst... » read more

New Technology Accelerates Multi-Die System Simulation
By Taruna Reddy - 27 Jul, 2023 - Comments: 0

AI-powered chatbots. Robotic manufacturing equipment. Self-driving cars. Bandwidth-intensive applications like these are flourishing—and driving the move from monolithic system-on-chips (SoCs) to multi-die systems. By integrating multiple dies, or chiplets, into a single package, designers can achieve scaling of system functionality at reduced risk and with faster time to market. Multi-die... » read more

Using AI To Close Coverage Gaps
By Ed Sperling - 26 Jul, 2023 - Comments: 0

Verification of complex, heterogeneous chips is becoming much more difficult and time-consuming. There are more corner cases, and devices have to last longer and behave according to spec throughout their lifetimes. This is where AI fits in. It can help identify redundancy and provide information about why a particular device or block may not be able to be fully covered, and it can do it in less... » read more

Blog Review: July 26
By Jesse Allen - 26 Jul, 2023 - Comments: 0

Siemens' Chris Spear shows how to make a group of specialized classes in SystemVerilog. Synopsys' Guy Cortez and Randy Fish consider what a silicon lifecycle management strategy looks like for SoCs deployed in HPC and data center environments. Cadence's Veena Parthan provides a primer on writing Python scripts for Fidelity, including API descriptions and different sets of packages to acce... » read more

Week In Review: Auto, Security, Pervasive Computing
By Liz Allan - 21 Jul, 2023 - Comments: 0

The Biden-Harris Administration announced the U.S. Cyber Trust Mark, a cybersecurity certification and labeling program to help consumers choose smart devices less vulnerable to cyberattacks. The Federal Communications Commission (FCC) is applying to register the Cyber Trust Mark with the U.S. Patent and Trademark Office and it would appear on qualifying smart products, including refrigerators,... » read more

Week In Review: Semiconductor Manufacturing, Test
By Gregory Haley - 21 Jul, 2023 - Comments: 0

TSMC is delaying construction on its $40 billion fab in Arizona due to a shortage of U.S. semiconductor workers and higher-than-expected expenses, Bloomberg reported. The Semiconductor Industry Association (SIA) urged the U.S. government to refrain from further restrictions on semiconductor technology to China “until it engages more extensively with industry and experts to assess the impac... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 Jul, 2023 - Comments: 0

Cadence will acquire Rambus' SerDes and memory interface PHY IP business. Rambus will retain its digital IP business, including memory and interface controllers and security IP. “With this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of novel memory solutions to support the continued evolution of the data center and AI,” said Sean Fan... » read more

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