Automotive Security Shifts To The System Level


Cars are getting smarter, more complicated, and more vulnerable to cyberattacks. As the amount of semiconductor and software content continues to increase, so does the number of over-the-air updates and connections to edge-based servers and services, adding a variety of new vectors for attacks. Properly securing vehicles requires engineers to first identify all the possible connection points... » read more

Securing FPGAs Beyond the Bitstream


FPGAs are a popular solution for low-volume applications and applications where frequent updates are essential to the value of the solution, as in many aerospace and defense and AI applications. Security is a critical part of FPGA solutions, and FPGA providers have invested much effort into securing the bitstream. However, there is a need for a cryptographic solution for FPGAs beyond the bitstr... » read more

Universities Augment Engineering Curricula To Boost Employability


Increasing numbers of universities are offering semiconductor courses in their engineering programs, and also in math, physics, and business degrees. Most universities now offer a broad foundation so students can pivot to other industries during cyclical downturns, or when technology and science create entirely new and potentially lucrative opportunities, such as generative AI, advanced pack... » read more

Blog Review: Feb. 5


Cadence's Rajneesh Chauhan explores the extended metadata feature in CXL 3.1, which helps systems manage memory and devices more effectively by sending extra information along with memory transactions to provide more context about what's happening during these transactions. Siemens' Bianca Ward recommends semiconductor companies combat rising production costs by leaning into digitalization a... » read more

AI In Data Management Has Limits


AI algorithms are being integrated into a growing number of EDA tools to automate different aspects of data management, but they also are forcing discussions about just how much decision-making should be turned over to machines and when that should happen. The ability of AI to sort through enormous amounts of design data to find patterns, both good and bad, is well recognized at this point. ... » read more

Chip Industry Week In Review


Chinese startup DeepSeek rattled the tech world and U.S. stock market with claims it spent just $5.6 million on compute power for its AI model compared to its billion-dollar rivals in the U.S. The announcement raised questions about U.S. investment strategies in AI infrastructure and led to an initial $600 billion selloff of NVIDIA stock. Since its launch, DeepSeek reportedly was hit by malicio... » read more

Complete Transistor Level Electrical Checks With Formal Analysis


Nothing is worse for a design team than a chip that fails to work in the bringup lab. Electrical problems are historically a major cause of such failures. Power leaks, power-ground DC paths, missing level shifters, and design flaws such as high fanout lead to unexpected power consumption, incorrect functionality, and even total meltdown. Designers learned years ago that pre-silicon electrical c... » read more

Chip Architectures Becoming Much More Complex With Chiplets


The migration from monolithic SoCs to chiplet-based designs is creating a confusing array of options and tradeoffs for design teams working at the leading edge, and the number of choices is only going to increase as third-party chiplets begin pouring into the market. That hasn't dampened the appetite for chiplets, however, which are deemed essential for future generations of semiconductors f... » read more

Chiplets Still A Challenge With UCIe 2.0


Plug-and-play chiplets are a popular goal, but does UCIe 2.0 move us any closer to that becoming a reality? The problem is that the current drivers of the standard are not after interoperability in the way that plug-and-play requires. Released in August 2024, UCIe 2.0 touts higher bandwidth density and improved power efficiency, as well as new features supporting 3D packaging, a manageable s... » read more

Design Customization Puts Heavy Burden On Verification


Experts At The Table: The pressure on verification engineers to ensure a device will function correctly has increased exponentially as chips become more complex and heterogeneous. Semiconductor Engineering sat down with a panel of experts, including Josh Rensch, director of application engineering at Arteris; Matt Graham, senior group director for verification software product management at Cad... » read more

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