tag: Synopsys

Blog Review: Sept. 4
By Jesse Allen - 04 Sep, 2024 - Comments: 0

Synopsys' Jyotika Athavale and Randy Fish sit down with Google's Rama Govindaraju and Microsoft's Robert S. Chappell to discuss silent data corruption and why a solution will require chip designers and manufacturers, software and hardware engineers, vendors, and anyone involved in computer data to collaborate and take the issue seriously. Siemens' Karen Chow and Joel Mercier explain the rela... » read more

Chip Industry Technical Paper Roundup: Sept. 3
By Linda Christensen - 03 Sep, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=256 /] More ReadingTechnical Paper Library home » read more

Hardware Security: One-Key Premise of Logic Locking
By Technical Paper Link - 30 Aug, 2024 - Comments: 0

A new technical paper titled "Late Breaking Results: On the One-Key Premise of Logic Locking" was published by researchers at Synopsys. Abstract "The evaluation of logic locking methods has long been predicated on an implicit assumption that only the correct key can unveil the true functionality of a protected circuit. Consequently, a locking technique is deemed secure if it resists a good ... » read more

Chip Industry Week in Review
By The SE Staff - 30 Aug, 2024 - Comments: 1

The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon. CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance ... » read more

AI’s Role In Chip Design Widens, Drawing In New Startups
By Karen Heyman - 29 Aug, 2024 - Comments: 0

Using AI in EDA is reinvigorating the whole tools industry, prompting established players to upgrade their tool offerings with AI/ML features, while drawing in startups trying to carve out differentiated approaches to fill unaddressed gaps with new tools and methodologies. Today’s new generation of entrepreneurs is comprised of both young post-grads with innovative ideas and industry veter... » read more

Edge Devices Require New Security Approaches
By Adam Kovac - 29 Aug, 2024 - Comments: 0

The diversity of connected devices and chips at the edge — the vaguely defined middle ground between the end point and the cloud — is significantly widening the potential attack surface and creating more opportunities for cyberattacks. The edge build-out has been underway for at least the past half-decade, largely driven by an explosion in data and increasing demands to process that data... » read more

Defining The Chiplet Socket
By Brian Bailey - 29 Aug, 2024 - Comments: 0

Experts At The Table: The semiconductor industry has been buzzing with the possibilities surrounding chiplets, but so far this packaging technology has been confined to large semiconductor companies that are vertically integrated. The industry has been attempting to open this up to a broader group of people. To work out what this means for chiplets, and what standardization will be required, Se... » read more

Accelerating The Pace And Precision Of AI Chip Innovation
By Stelios Diamantidis - 29 Aug, 2024 - Comments: 0

The Hot Chips 2024 conference, which took place this week in Silicon Valley, was a showcase for AI chip innovation. The three-day program illustrated the race among both established chipmakers and new entrants to explore advanced architectures and embrace novel design solutions to deliver the next breakthrough AI processor. In this article, I share a few “hot takes” from the conference that... » read more

Developing Workflows To Streamline System-Level Design
By Ann Mutschler - 28 Aug, 2024 - Comments: 0

Experts At The Table: One of the big challenges facing EDA companies is explaining to customers what's possible, how to streamline their designs, and what can be accomplished at what level of risk. Semiconductor Engineering sat down to talk about how relationships are fundamentally changing between EDA companies and their customers Michal Siwinski, chief marketing officer at Arteris; Chris Muet... » read more

Enabling Efficient Multi-Die Design Implementation and IP Integration
By Synopsys - 28 Aug, 2024 - Comments: 0

Many industry trends are driving chip developers to consider multi-die designs using advanced 2.5D and 3D technologies. Such designs enable incorporating heterogeneous and homogeneous dies in a single package, increasing density while reducing signal propagation times. However, multi-die designs introduce new challenges that must be addressed by all relevant electronic design automation (EDA) a... » read more

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