Chiplets Still A Challenge With UCIe 2.0


Plug-and-play chiplets are a popular goal, but does UCIe 2.0 move us any closer to that becoming a reality? The problem is that the current drivers of the standard are not after interoperability in the way that plug-and-play requires. Released in August 2024, UCIe 2.0 touts higher bandwidth density and improved power efficiency, as well as new features supporting 3D packaging, a manageable s... » read more

Design Customization Puts Heavy Burden On Verification


Experts At The Table: The pressure on verification engineers to ensure a device will function correctly has increased exponentially as chips become more complex and heterogeneous. Semiconductor Engineering sat down with a panel of experts, including Josh Rensch, director of application engineering at Arteris; Matt Graham, senior group director for verification software product management at Cad... » read more

Blog Review: Jan. 29


Cadence's Reela Samuel looks beyond silicon to new semiconductor materials under development and the particular applications for gallium nitride, silicon carbide, indium phosphide, glass, and diamond. Siemens' Kyle Fraunfelter and Melville Bryant find that lean approaches alone cannot address the increasingly complex sustainability challenges of semiconductor manufacturing and call for the e... » read more

Advanced Packaging Moving At Breakneck Pace


Experts at the Table: Semiconductor Engineering sat down to discuss advances in packaging with Michael Kelly, vice president of Chiplets and FCBGA Integration at Amkor; William Chen, fellow at ASE; Dick Otte, CEO of Promex Industries; and Sander Roosendaal, R&D director at Synopsys Photonics Solutions. What follows are excerpts of that discussion. [Part 2 of the discussion is here.] ... » read more

Assembly Design Rules Slowly Emerge


Process design kits (PDKs) play an essential in ensuring that silicon technology can proceed from one generation to the next in a manner that design tools can keep up with. No such infrastructure has been needed for packaging in the past, but that's beginning to change with advanced packages. Heterogeneous assemblies are still ramping up, but their benefits are attracting new designs. “Chi... » read more

Chip Industry Week In Review


The new Trump administration was quick to put a different stamp on the tech world: President Trump rescinded a long list of Biden’s executive orders, including those aimed at AI safety and the mandate for 50% EVs by 2030. Roughly 1.3 million EVs were sold in the U.S. in 2024, up 7.3% from 2023. The new administration announced $500 billion ($100 billion initially) in private sector in... » read more

More Than Meets The Eye: Trends In Lithography


Lithography, once the exclusive domain of artists and printmakers, also lies at the heart of integrated circuit (IC) production. The process of shining light on a substrate through a photomask to control exposure has been around since the 1960s and has been the key part of improving IC fabrication process resolution. At the time, the light sources used were in the human-visible spectrum, which ... » read more

Electrifying Everything: Power Moves Toward ICs


As electronic systems grow increasingly complex and energy-intensive, traditional power management methods — centered on centralized systems and external components — are proving inadequate. The next wave of innovation is to bring power control closer to the action — directly on the chip or into a heterogeneous package. This change is driven by a relentless pursuit of efficiency, scala... » read more

Automotive OEMs Face Multiple Technology Adoption Challenges


Experts At The Table: The automotive ecosystem is in the midst of significant change. OEMs and tiered providers are grappling with how to deal with legacy technology while incorporating ever-increasing levels of autonomy, electrification, and software-defined vehicle concepts, just to name a few. Semiconductor Engineering sat down to discuss these and other related issues with Wayne Lyons, seni... » read more

Blog Review: Jan. 22


Cadence's David Shin provides an overview of the eUSB2V2 specification, which scales up to 4.8Gbps of data rate and provides the flexibility to configure either asymmetrical or symmetrical links depending on the intended application. Siemens EDA's Spencer Acain highlights the key role of AI in semiconductor testing, including the addition of analytical AI in DFT tools and how applying machin... » read more

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