tag: system in package

System-in-Package Challenges
By Ed Sperling - 23 Apr, 2026 - Comments: 0

Systems companies and leading-edge chipmakers are pushing past reticle limits with chiplet-based designs, often breaking compute-intensive functions into different chiplets and coupling those with other chiplets that may have been developed by different teams and at different process nodes. This is harder than it sounds, and results can vary widely even under the best circumstances. Nir Sever, ... » read more

Microelectronics and Advanced Packaging Technologies Roadmap 2.0 (SRC)
By Technical Paper Link - 14 Oct, 2025 - Comments: 0

The Semiconductor Research Corporation just released its Microelectronics and Advanced Packaging Technologies (MAPT) Roadmap 2.0, a comprehensive update to the industry’s first 3D semiconductor roadmap. The roadmap includes contributions of over 370 experts from 132 organizations, with updated content and a new chapter on digital twins and their applications. The roadmap was funded by the ... » read more

Development and Deployment of 2.5D Multi-Foundry Chiplet Solution Scaling Beyond Multi-Reticle Approaches (Intel)
By Technical Paper Link - 03 Jul, 2025 - Comments: 0

A new technical paper titled "System-Level Validation Across Multiple Platforms to build a Robust 2.5D Multi Foundry Chiplet Solution" was published by researchers at Intel Corporation. Abstract "The proliferation of chiplet-based designs, driven by the escalating computational demands of AI, presents unique validation challenges when integrating heterogenous chiplets. This paper investigat... » read more

Accelerating Scalable Computing
By Shivi Arora - 02 Jun, 2025 - Comments: 0

By Shivi Arora and Sue Hung Fung As computing demands for HPC, AI/ML, and cloud infrastructure grow, modular architectures are replacing traditional monolithic System-on-Chip (SoC) designs. These legacy designs are increasingly expensive and difficult to scale due to ever-increasing silicon complexity. In response, the industry is embracing chiplet-based System-in-Package (SiP) solutions,... » read more

AI And Semiconductor In Reciprocity
By Mike Hung - 20 Mar, 2025 - Comments: 0

In today’s rapidly advancing technological era, AI has become a powerful catalyst for innovation and progress. Advanced semiconductor packaging plays a crucial role in supporting AI development, while AI applications create new semiconductor demands and drive the development of semiconductor technologies, with both complementing each other. Semiconductor packaging: The bridge between chip an... » read more

Systems-in-Package: Authenticated Partial Encryption Protocol For Secure Testing (U. of Florida)
By Technical Paper Link - 12 Nov, 2024 - Comments: 0

A new technical paper titled "GATE-SiP: Enabling Authenticated Encryption Testing in Systems-in-Package" was published by researchers at University of Florida and University of Central Florida. Abstract: "A heterogeneous integrated system in package (SIP) system integrates chiplets outsourced from different vendors into the same substrate for better performance. However, during post-integra... » read more

3DIO IP For Multi-Die Integration
By Lakshmi Jain - 17 Oct, 2024 - Comments: 0

By Lakshmi Jain and Wei-Yu Ma The demand for high performance computing, next-gen servers, and AI accelerators is growing rapidly, increasing the need for faster data processing with expanding workloads. This rising complexity presents two significant challenges: manufacturability and cost. From a manufacturing standpoint, these processing engines are nearing the maximum size that lithogra... » read more

Complex Heterogeneous Integration Drives Innovation In Semiconductor Test
By Jeorge Hurtarte - 15 Oct, 2024 - Comments: 0

Heterogeneous integration is driving innovation in the semiconductor industry, but it also introduces more complexity in chip design, which translates to more intricate test requirements. The automated test equipment (ATE) industry is responding, developing and utilizing more sophisticated test equipment capable of handling the diverse functionalities and interfaces needed to test heterogeneous... » read more

Simultaneous Bi-Directional Signaling: A Breakthrough Alternative For Multi-Die Assemblies
By Ramin Farjadrad - 29 Aug, 2024 - Comments: 0

In designing multi-die systems-in-package, with or without chiplets, it is easy to think of the interconnect between dies as simply analogous to the interconnect between functional blocks on a single die. But this analogy can lead architects and designers into a blind alley from which it becomes impossible to meet system performance and power requirements. The reason lies in fundamental differe... » read more

Development Of Capacitance Measurement Unit For A System Level Tester
By BeomSeok Kim - 20 Jun, 2024 - Comments: 0

By BeomSeok Kim, SeongHwan Kim, Unki Kim, SeongBeom Cho, DongHo Seo, and SangHun Yun In back-end semiconductor processing it is important to improve the performance of semiconductors due to the limitations of miniaturization in front-end processes. To achieve this goal, the industry continues to invest in back-end processing and competition is fierce in advanced technology of back-end proces... » read more

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