Large-Scale Quantum-Processing Architecture Surpassing The Tier of 1000 Atomic Qubits (TU Darmstadt)


A technical paper titled “Supercharged two-dimensional tweezer array with more than 1000 atomic qubits” was published by researchers at Technische Universität Darmstadt (TU Darmstadt). Abstract: "We report on the realization of a large-scale quantum-processing architecture surpassing the tier of 1000 atomic qubits. By tiling multiple microlens-generated tweezer arrays, each operated by a... » read more

Chip Industry Technical Paper Roundup: Mar. 5


New technical papers added to Semiconductor Engineering’s library this week. [table id=201 /] » read more

White-Box Fuzzer With Static Analysis To Detect And Locate Timing Vulnerabilities In RISC-V Processors 


A technical paper titled “WhisperFuzz: White-Box Fuzzing for Detecting and Locating Timing Vulnerabilities in Processors” was published by researchers at Indian Institute of Technology Madras, Texas A&M University, and Technische Universität Darmstadt. Abstract: "Timing vulnerabilities in processors have emerged as a potent threat. As processors are the foundation of any computing s... » read more

Chip Industry’s Technical Paper Roundup: Dec 11


New technical papers added to Semiconductor Engineering’s library this week. [table id=174 /] More ReadingTechnical Paper Library home » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan AMD took the covers off new AI accelerators for training and inferencing of large language model and high-performance computing workloads. In its announcement, AMD focused heavily on performance leadership in the commercial AI processor space through a combination of architectural changes, better software efficiency, along with some improvements in... » read more

Hardware Fuzzing With MAB Algorithms


A technical paper titled “MABFuzz: Multi-Armed Bandit Algorithms for Fuzzing Processors” was published by researchers at Texas A&M University and Technische Universitat Darmstadt. Abstract: "As the complexities of processors keep increasing, the task of effectively verifying their integrity and security becomes ever more daunting. The intricate web of instructions, microarchitectural ... » read more

Chip Industry’s Technical Paper Roundup: Apr. 18


New technical papers recently added to Semiconductor Engineering’s library: [table id=93 /]   If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involv... » read more

Hybrid Hardware Fuzzer, Combining Capabilities of Formal Verification Methods And Fuzzing Tools


A new technical paper titled "HyPFuzz: Formal-Assisted Processor Fuzzing" was published by researchers at Texas A&M University and Technische Universität Darmstadt. Abstract: "Recent research has shown that hardware fuzzers can effectively detect security vulnerabilities in modern processors. However, existing hardware fuzzers do not fuzz well the hard-to-reach design spaces. Consequently,... » read more

Power/Performance Bits: Feb. 16


Superconducting microprocessor Researchers at Yokohama National University created a superconducting processor with zero electrical resistance. Huge amounts of power are being used by computers today, and compared to the human brain, they are many orders of magnitude less efficient. Superconductors have been a popular approach to making computers more efficient, but this requires extreme co... » read more