tag: TEL

Devices And Transistors For The Next 75 Years
By Laura Peters - 16 Feb, 2023 - Comments: 0

The 75th anniversary of the invention of the transistor sparked a lively panel discussion at IEDM, spurring debate about the future of CMOS, the role of III-V and 2D materials in future transistors, and what will be the next great memory architecture.[1] Industry veterans from the memory, logic, and research communities see high-NA EUV production, NAND flash with 1,000 layers, and hybrid bon... » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 16 Dec, 2022 - Comments: 0

The CHIPS Act sparked $200 billion in private investments for U.S. semiconductor production, including 40 new semiconductor ecosystem projects, according to SIA. China is working toward self-sufficiency, with plans to invest more than 1 trillion yuan ($143 billion) to support domestic semiconductor production, according to Reuters. Arm said that Britain and the U.S. would not approve license... » read more

How Far Will Copper Interconnects Scale?
By Laura Peters - 15 Dec, 2022 - Comments: 0

As leading chipmakers continue to scale finFETs — and soon nanosheet transistors — to ever-tighter pitches, the smallest metal lines eventually will become untenable using copper with its liner and barrier metals. What comes next, and when, is still to be determined. There are multiple options being explored, each with its own set of tradeoffs. Ever since IBM introduced the industry to c... » read more

Challenges In Backside Power Delivery
By Laura Peters - 17 Nov, 2022 - Comments: 0

One of the key technologies to enable scaling below 3nm involves delivering of power on the backside of a chip. This novel approach enhances signal integrity and reduces routing congestion, but it also creates some new challenges for which today there are no simple solutions. Backside power delivery (BPD) eliminates the need to share interconnect resources between signal and power lines on t... » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 04 Nov, 2022 - Comments: 0

Nikkei Asia reports the U.S. is urging allies, including Japan, to restrict exports of advanced semiconductors and related technology to China. The U.S. holds 12% of the global semiconductor market, Japan has a 15% share, while Taiwan and South Korea each have about a 20% share. Some U.S. companies have called for other countries to adopt U.S.-style export curbs, arguing it is unfair for only A... » read more

AI Feeds Vision Processor, Image Sensor Boom
By Susan Rambo - 03 Nov, 2022 - Comments: 0

Vision systems are rapidly becoming ubiquitous, driven by big improvements in image sensors as well as new types of sensors. While the sensor itself often is developed using mature-node silicon, increasingly it is connected to vision processors developed at the most advanced process nodes. That allows for the highest performance per watt, and it also allows designs to incorporate AI accelera... » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 21 Oct, 2022 - Comments: 0

Fallout from the new U.S. export controls continues. Under new regulations, companies looking to supply Chinese chipmakers with advanced manufacturing equipment (<14nm) must first obtain a license from the U.S. Department of Commerce. In addition, U.S. persons (citizens and permanent residents) are barred from supporting China’s advanced chip development or production without a license. ... » read more

Wafer Cleaning Becomes Key Challenge In Manufacturing 3D Structures
By Adele Hars - 20 Oct, 2022 - Comments: 0

Wafer cleaning, once a rather mundane task as simple as dipping wafers in cleaning fluid, is emerging as one of the top major engineering challenges for manufacturing GAA FETs and 3D-ICs. With these new 3D structures — some on the horizon but some already in high-volume manufacturing — semiconductor wafer equipment and materials suppliers in the wet cleaning business are at the epicenter... » read more

What’s Different About Next-Gen Transistors
By Katherine Derbyshire - 20 Oct, 2022 - Comments: 0

After nearly a decade and five major nodes, along with a slew of half-nodes, the semiconductor manufacturing industry will begin transitioning from finFETs to gate-all-around stacked nanosheet transistor architectures at the 3nm technology node. Relative to finFETs, nanosheet transistors deliver more drive current by increasing channel widths in the same circuit footprint. The gate-all-aroun... » read more

Metal Oxide Resist (MOR) EUV Lithography Processes For DRAM Application
By TEL - 19 Oct, 2022 - Comments: 0

This paper reports the readiness of key EUV resist process technologies using Metal Oxide Resist (MOR) aiming for the DRAM application. For MOR, metal contamination reduction and CD uniformity (CDU) are the key performance requirements expected concerning post exposure bake (PEB). Based on years of experience with spin-on type Inpria MOR, we have designed a new PEB oven to achieve contamination... » read more

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