Combining Silicon Data Capture And Edge Processing Offers A Promising Solution For Automotive OEMs

By Lorin Kennedy - 05 Sep, 2024 - Comments: 0

By Lorin Kennedy and Jasmin Mulaosmanovic In the world of electric (EV) and software-defined vehicles (SDV), a key challenge and opportunity besets original equipment manufacturers (OEM): that of effectively harnessing in-vehicle and silicon data to improve user experience and quite literally drive business benefits. While collecting telemetry data is straightforward enough, the difficulty l... » read more

SoC Telemetry & Performance Analysis Using Statistical Profiling Extension

By Brian Jeff - 11 Jan, 2024 - Comments: 0

The Arm Statistical Profiling Extension (SPE) is an architectural feature designed for enhanced instruction execution profiling within Arm CPUs. This feature has been available since the introduction of the Neoverse N1 CPU platform in 2019, along with performance monitor units (PMUs) generally available in Arm CPUs. An important step in extracting value from capabilities like SPE and PMUs is th... » read more

Plugging Gaps In The IC Supply Chain

By Anne Meixner - 09 Jan, 2024 - Comments: 0

Multiple touch points in manufacturing and packaging are exposing gaps in the data used to track different components, making it difficult to identify the source of issues that can affect yield and reliability, and opening the door to counterfeit or sub-standard parts. This involves more than just assigning a simple identifying code to a chip. At different points in a device's lifecycle, new... » read more

Improving Reliability In Chips

By Anne Meixner - 12 Sep, 2023 - Comments: 1

Semiconductor Engineering sat down to discuss changes in test that address tracing device quality throughout a product’s lifetime with Tom Katsioulas, CEO at Archon Design Solutions and U.S. Department of Commerce IoT advisory board member; Ming Zhang, vice president of R&D Acceleration at PDF Solutions; and Uzi Baruch, chief strategy officer at proteanTecs. What follows are excerpts of t... » read more

Pinpointing Timing Delays in Complex SoCs

By Anne Meixner - 11 Jul, 2023 - Comments: 0

Telemetry circuits are becoming a necessity in complex heterogeneous chips and packages to show how these devices are behaving post-production, but fusing together relevant data to identify the sources of problems adds its own set of challenges. In the past, engineering teams could build margin into chips to offset any type of variation. But at advanced nodes and in advanced packages, tolera... » read more

Test Challenges Mount As Demands For Reliability Increase

By Anne Meixner - 07 Mar, 2023 - Comments: 0

An emphasis of improving semiconductor quality is beginning to spread well beyond just data centers and automotive applications, where ICs play a role in mission- and safety-critical applications. But this focus on improved reliability is ratcheting up pressure throughout the test community, from lab to fab and into the field, in products where transistor density continues to grow — and wh... » read more

New Data Management Challenges

By Ann Mutschler - 13 Sep, 2022 - Comments: 0

An explosion in semiconductor design and manufacturing data, and the expanding use of chips in safety-critical and mission-critical applications, is prompting chipmakers to collect and manage that data more effectively in order to improve overall performance and reliability. This collection of data reveals a number of challenges with no simple solutions. Data may be siloed and inconsistent, ... » read more

The Drive Toward More Predictive Maintenance

By Anne Meixner - 08 Sep, 2022 - Comments: 0

Maintenance is a critical behind-the-scenes activity that keeps manufacturing facilities running and data centers humming. But when not performed in a timely manner, it can result in damaged products or equipment, or significant system/equipment downtime. By shifting from scheduled maintenance to predictive maintenance, factories and electronic system owners can reap substantial benefits, in... » read more

Monitoring Performance From Inside A Chip

By Ed Sperling - 01 Jun, 2021 - Comments: 0

Deep data, which is generated inside the chip rather than externally, is becoming more critical at each new process node and in advanced packages. Uzi Baruch, chief strategy officer at proteanTecs, talks with Semiconductor Engineering about using that data to identify potential problems before they result in failures in the field, and why it's essential to monitor these devices throughout their... » read more

Making Chips To Last Their Expected Lifetimes

By Ed Sperling - 21 Oct, 2020 - Comments: 2

Chips are supposed to last their lifetime, but that expectation varies greatly depending upon the end market, whether the device is used for safety- or mission-critical applications, and even whether it can be easily replaced or remotely fixed. It also depends on how those chips are used, whether they are an essential part of a complex system, and whether the cost of continual monitoring and... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?