tag: test

High-Speed Manufacturing And In-Field Scan Test Access Via PCI Express For GPIO Limited SoCs
By Ash Patel - 09 Jun, 2026 - Comments: 0

By Ash Patel and Shubharthi Datta, Synopsys, and Chuanyun Fan, Cisco Today’s huge, deep submicron system on chip (SoC) designs present many challenges at every stage of development, from architectural exploration to volume production. This post addresses the specific hurdle of effective and efficient manufacturing tests for these complex devices. It outlines a commercially available soluti... » read more

Test Anything, Anywhere, Anytime
By Peter Orlando - 09 Jun, 2026 - Comments: 0

The semiconductor industry is under relentless pressure to deliver devices that are not only high-performing but also exceptionally reliable across their entire lifecycle. From the moment a chip is tested at the wafer to its deployment in complex systems such as data centers and automotive platforms, the expectation is clear: zero-defect quality at shipment and continuous reliability in the fie... » read more

What’s Really Needed For Advanced Test?
By Greg Prewitt - 12 May, 2026 - Comments: 0

By Greg Prewitt and Marc Jacobs Advanced test has become one of the semiconductor industry's most promising frontiers: adaptive binning, feed-forward models, and real-time analytics pulling signals from mountains of measurement data. But there is a problem hiding underneath all that ambition, and it is neither compute nor algorithm; it is data. More specifically, it is the unglamorous, found... » read more

Test Distribution Evolves To Meet AI Challenges
By Fabio Pizza - 12 May, 2026 - Comments: 0

The proliferation of artificial intelligence (AI) is driving rapid acceleration of the semiconductor market, which analysts now predict will reach $1 trillion this year. Many semiconductor devices will be the GPUs that populate the data centers that run AI workloads. Driven by strong, sustained investments from hyperscaler operators, high-performance computing (HPC)/AI data centers are expected... » read more

The AI Server Challenge: Testing Power At Scale
By Aik-Moh Ng - 12 May, 2026 - Comments: 0

Artificial intelligence is most often framed as a story of compute advancements. Faster GPUs, denser accelerators, and advanced process nodes. But behind every AI workload, the most fundamental constraint is power. Fig. 1: AI server market. Source: Grand View Research As AI servers scale to meet data center demand, power delivery is becoming one of the most critical and complex engine... » read more

Enhancing Silicon Reliability With In-System Test And SLM Data
By Adam Cron - 07 Apr, 2026 - Comments: 0

Innovation in semiconductor development and manufacturing shows no signs of slowing down. Ever-larger chips at ever-smaller geometries create new challenges all the time. At the same time, competitive pressures are shrinking time to market (TTM) and putting enormous pressure on project teams. Furthermore, the wide use of electronics in safety-critical applications demands better reliability, av... » read more

Harnessing Digital Twins And AI/ML For Smarter Semiconductor Test Optimization
By Vincent Chu - 07 Apr, 2026 - Comments: 0

As semiconductor devices become increasingly complex, the challenge of testing them efficiently and accurately grows in parallel. Traditional testing methods—rooted in static test plans—often fall short in dealing with the nuances of today's advanced integrated circuits (ICs), especially in high-volume manufacturing environments. In response, the industry is exploring real-time, data-dri... » read more

Analog Scan: Unlocking A New Era In Mixed-Signal Test
By Vladimir Zivkovic - 10 Mar, 2026 - Comments: 0

Anyone involved in IC product sign-off that includes a mixed signal design portion knows that developing robust tests for these intricate designs has historically been a significant bottleneck, no matter the application. It's a hurdle many of us have faced, leading to extended development times, high costs, and sometimes an unsettling uncertainty about the true quality of our tests. Traditio... » read more

Maximize Your Revenue With High-Speed Test Performance Optimization
By Jesse Ko - 10 Mar, 2026 - Comments: 0

In today’s competitive semiconductor market, revenue growth is often associated with design innovation, process advancements, or packaging breakthroughs. However, a powerful and frequently overlooked revenue lever lies much closer to production: high-speed test performance optimization. Test variability—particularly at high frequencies—can significantly influence product binning, yield... » read more

Enabling Seamless Monitoring, Test, And Repair In Multi-Die Designs
By Yervant Zorian - 10 Mar, 2026 - Comments: 0

By Yervant Zorian and Sandeep Kumar Goel Anyone who follows the semiconductor industry knows that the accelerating performance, scale and energy efficiency demands of the AI revolution are outpacing the advances achievable by simply pushing the chip performance of monolithic, single-die designs. Multi-die design using 2.5D and 3D technologies has emerged as a necessity to keep the pace of in... » read more

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