Low-Power Relaxation Oscillator With Temperature-Compensated Thyristor Decision Elements


This paper presents a low-power 140 kHz relaxation oscillator (ROSC) for low-frequency clock generators and timers. In voltage-mode ROSCs, unavoidable shunt current consumption results from voltage slewing at the integration capacitor. The proposed circuit employs CMOS thyristor-based decision elements which effectively reduce shunt currents by exploiting internal positive feedback. A complemen... » read more

ESD Requirements Are Changing


Standards for specifying a chip’s ability to withstand electrostatic discharge (ESD) are changing – in some cases, getting tougher, and in others, easing up. ESD protection has been on a path from a one-size-fits-all approach to one where a signal’s usage helps to determine what kind of protection it should get. Protecting chips from ESD damage has been a longstanding part of IC design... » read more

Earlier Is Better In Latch-Up Detection


Physical verification is an essential step in integrated circuit (IC) design verification. Foundries provide design rule manuals that specify the precise physical requirements needed to ensure the design can be correctly manufactured, and the verification team runs the layout through checks based on those rules to ensure compliance. However, ensuring that a design can be manufactured does not g... » read more

Tech Talk: Extending DRAM


Bruce Bateman, senior principal engineer at Kilopass, talks about how to extend the life of DRAM and how to work with smaller, denser memory.   Related Stories Executive Insight: Charlie Cheng Kilopass’ CEO talks about how to cut the capacitor in DRAM and why that’s important in the data center. » read more