Why Small Fab And Assembly Houses Are Thriving

By Bryon Moyer - 15 Aug, 2024 - Comments: 0

High-volume products get more than their fair share of attention in the semiconductor world, but most chips don't fit into that category. While a few huge fabs and offshore assembly and test (OSAT) houses process enormous volumes of chips, small fabs and packaging lines serve for lower volumes, specialized technology, and prototyping. “There are companies that run literally one lot of 25 w... » read more

Chip Industry Technical Paper Roundup: May 7

By Liz Allan - 07 May, 2024 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=223 /] More ReadingTechnical Paper Library home » read more

Chip Industry Week In Review

By The SE Staff - 03 May, 2024 - Comments: 0

Samsung and Synopsys collaborated on the first production tapeout of a high-performance mobile SoC design, including CPUs and GPUs, using the Synopsys.ai EDA suite on Samsung Foundry's gate-all-around (GAA) process. Samsung plans to begin mass production of 2nm process GAA chips in 2025, reports BusinessKorea. UMC developed the first radio frequency silicon on insulator (RF-SOI)-based 3D IC ... » read more

Chip Industry Week In Review

By The SE Staff - 12 Jan, 2024 - Comments: 0

By Jesse Allen, Karen Heyman, and Liz Allan Renesas will acquire Transphorm, which designs and manufactures gallium nitride power devices, for about $339 million. GaN, which is a wide-bandgap technology, is used for high-voltage applications in a slew of markets, including EVs and EV fast chargers, as well as data centers and industrial applications. Cadence acquired Invecas, a provider o... » read more

Week In Review: Semiconductor Manufacturing, Test

By Gregory Haley - 12 May, 2023 - Comments: 0

Global semiconductor sales reached $574 billion in 2022, and U.S. semiconductor companies accounted for sales totaling $275 billion, or 48% of the global market, according to the 2023 Factbook released by the Semiconductor Industry Association (SIA). DRAM and NAND prices likely will continue to fall further this quarter because production cuts have not kept pace with weakening demand, accord... » read more

Week In Review: Semiconductor Manufacturing, Test

By Gregory Haley - 03 Mar, 2023 - Comments: 0

Semiconductor Research Corporation (SRC) released an interim roadmap for Microelectronic and Advanced Packaging Technologies (MPAT) that targets 10- to 15-year goals for 3D integration and multi-chiplet packaging. The roadmap is open for comments. Participants in the MPAT include AMD, IBM, Intel, Texas Instruments, Purdue University, SUNY Binghamton and the Georgia Institute of Technology. It i... » read more

Solving Problems With The IoT

By John Koon - 02 Feb, 2023 - Comments: 0

The Internet of Things, a term once applied to almost any "smart" gadget connected to the Internet, is becoming more useful, more complex, and more of a security risk as the value of data continues to grow and more people depend on IoT technology. In the decades since the concept was first introduced, IoT devices have become so ubiquitous that applications cover practically every consumer, c... » read more

Collaboration Widens Among Big Chip Companies

By Ed Sperling - 23 Jan, 2023 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss the growing need for collaboration among equipment and tools vendors, the impact of systems companies and increases in complexity, and how to handle a push for more customization while controlling costs, with Martin van den Brink, president and CTO of ASML; Luc Van den Hove, CEO of imec; David Fried, vice president of computati... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 20 Jan, 2023 - Comments: 0

Pervasive computing Keysight Technologies introduced its new Electrical Performance Scan (EP-Scan), a high-speed digital simulation tool for rapid signal integrity (SI) analysis for hardware engineers and printed circuit board (PCB) designers. Siemens Digital Industries Software announced the opening of its eXplore Live at The Smart Factory @ Wichita, housed at Wichita State University’... » read more

Challenges And Solutions In Chip Design

By Marc Swinnen - 21 Nov, 2022 - Comments: 0

Ansys is hosting IDEAS Digital Forum 2022, a no-cost virtual event that brings together industry executives and technical design experts to discuss the latest in EDA for Semiconductors, Electronics, and Photonics. The December 6th on-line event starts with Keynote addresses from Raja Koduri from Intel, Pankaj Kukkal from Qualcomm, and insights into the metaverse from DP Prakash with start-up... » read more

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Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey