tag: TSMC

Week In Review: Design, Low Power
By Jesse Allen - 09 Oct, 2020 - Comments: 0

Arm spun out Cerfe Labs to develop and license new types of non-volatile memories based on correlated electron materials (CeRAM) and ferroelectric transistors (FeFETs). Arm CeRAM researchers will join Cerfe Labs and assume ownership of the Arm joint development project with Symetrix Corporation. Read more about the new company and its technology in Cerfe Labs: Spin-On Memory. Tools & IP ... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 09 Oct, 2020 - Comments: 0

Security A new certification program for hardware verification engineers from Edaptive Computing Inc (ECI) and OneSpin Solutions promises to help companies meet IC integrity standards for SoC designs for 5G, IoT, AI, automotive, industrial, defense, and avionics. These designs are often complex, with a variety of elements, such as programmable logic and different cores. The OneSpin Formal Veri... » read more

One SerDes Solution Doesn’t Fit All
By Paul McLellan - 08 Oct, 2020 - Comments: 0

Way back in the 1960s, E. Rent, who was working at IBM at the time, noticed a connection between the number of pins P on integrated circuits being used and the number of gates G on the integrated circuits. It was a power law, where the number of pins was cGR where c and R are constants. Actually, traditionally a Greek rho is used instead of R. It usually has a value between 0.5 and 0.8. If R... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 02 Oct, 2020 - Comments: 0

Chipmakers and OEMs NXP has announced the grand opening of its 150mm (6-inch) RF gallium nitride (GaN) fab in Chandler, Ariz. This is said to be the most advanced fab dedicated to 5G RF power amplifiers in the United States. NXP’s new Chandler-based GaN fab is qualified now, with initial products ramping in the market and expected to reach full capacity by the end of 2020. GaN, a III-V techn... » read more

System-Level Packaging Tradeoffs
By Ann Mutschler - 30 Sep, 2020 - Comments: 0

Leading-edge applications such as artificial intelligence, machine learning, automotive, and 5G, all require high bandwidth, higher performance, lower power and lower latency. They also need to do this for the same or less money. The solution may be disaggregating the SoC onto multiple die in a package, bringing memory closer to processing elements and delivering faster turnaround time. But ... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 18 Sep, 2020 - Comments: 0

Chipmakers and OEMs Apple has launched a new Apple Watch and iPad. Missing from the announcement was the iPhone 12, which may appear next month, according to Krish Sankar, an analyst at Cowen. What was interesting about this week’s announcement? Apple unveiled the iPad Air with the A14 Bionic, Apple’s most advanced chip. “Apple revealed the new 8th gen iPad (starting at $329) powered by ... » read more

Industry Pushes For Fab Tool Security Standards
By Mark LaPedus - 17 Sep, 2020 - Comments: 1

The semiconductor industry is developing new cybersecurity standards for fab equipment in an effort to protect systems from potential cyberattacks, viruses, and IP theft. Two new standards are in the works, which are being formulated under the auspices of the SEMI trade group with leadership from chipmakers and others. Led by Intel and Cimetrix, the first standard deals with malware-free equ... » read more

Momentum Builds For Advanced Packaging
By Mark LaPedus - 17 Sep, 2020 - Comments: 0

The semiconductor industry is stepping up its efforts in advanced packaging, an approach that is becoming more widespread with new and complex chip designs. Foundries, OSATs and others are rolling out the next wave of advanced packaging technologies, such as 2.5D/3D, chiplets and fan-out, and they are developing more exotic packaging technologies that promise to improve performance, reduce p... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 11 Sep, 2020 - Comments: 0

Synopsys announced an electronic and photonic co-design platform for photonic integrated circuit (PIC) design, layout implementation, and verification. The OptoCompiler provides schematic-driven layout and advanced photonic layout synthesis in the same platform. AI Rambus says it clocked 4.0 Gbps on its HBM2E memory interface (PHY and controller), which is a desirable speed for AI/ML traini... » read more

OIP Ecosystem Forum 2020
By Paul McLellan - 10 Sep, 2020 - Comments: 0

Last Tuesday was the virtual TSMC OIP Ecosystem Forum. Apart from being virtual, the format was similar to the usual. Cliff Hou, Senior Vice President of Technology Development, opened the day with a summary of where everything is in the ecosystem around each of the new processes. There were then three keynotes by the leaders of the three big EDA companies. That was followed by more technical ... » read more

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